Search Results - Kargaran, Ehsan

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  1. 1
    Design Considerations for a Sub-mW Receiver Front-End for Internet-of-Things

    Design Considerations for a Sub-mW Receiver Front-End for Internet-of-Things by Kargaran, Ehsan, Manstretta, Danilo, Castello, Rinaldo

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  2. 2
    Design Considerations for a Sub-mW Wireless Medical Body-Area Network Receiver Front End

    Design Considerations for a Sub-mW Wireless Medical Body-Area Network Receiver Front End by Kargaran, Ehsan, Manstretta, Danilo, Castello, Rinaldo

    Published in Micromachines (Basel)
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  3. 3
    Design and Analysis of 2.4 GHz 30~\mu \text CMOS LNAs for Wearable WSN Applications

    Design and Analysis of 2.4 GHz 30~\mu \text CMOS LNAs for Wearable WSN Applications by Kargaran, Ehsan, Manstretta, Danilo, Castello, Rinaldo

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  4. 4
    A Sub-1-V, 350- \mu W, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS

    A Sub-1-V, 350- \mu W, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS by Kargaran, Ehsan, Guo, Benqing, Manstretta, Danilo, Castello, Rinaldo

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  5. 5
    A Sub-1-V, 350-[Formula Omitted]W, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS

    A Sub-1-V, 350-[Formula Omitted]W, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS by Kargaran, Ehsan, Guo, Benqing, Manstretta, Danilo, Castello, Rinaldo

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  6. 6
    An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands

    An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands by Montanari, Daniele, Castellano, Gerardo, Kargaran, Ehsan, Pini, Giacomo, Tijani, Saheed, De Caro, Davide, Strollo, Antonio Giuseppe Maria, Manstretta, Danilo, Castello, Rinaldo

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  7. 7
    Design of 0.4V, 386nW OTA using DTMOS technique for biomedical applications

    Design of 0.4V, 386nW OTA using DTMOS technique for biomedical applications by Kargaran, E., Sawan, M., Mafinezhad, K., Nabovati, H.

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  8. 8
    A 1.5–2.8 GHz current-mode LNTA achieving >25 dBm IIP3 and +8 dBm P-1dB gain compression

    A 1.5–2.8 GHz current-mode LNTA achieving >25 dBm IIP3 and +8 dBm P-1dB gain compression by Kargaran, Ehsan, Manstretta, Danilo, Castello, Rinaldo

    Published in Microelectronics
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  9. 9
    An ultra low voltage ultra low power CMOS UWB LNA using forward body biasing

    An ultra low voltage ultra low power CMOS UWB LNA using forward body biasing by Dehqan, A., Kargaran, E., Mafinezhad, K., Nabovati, H.

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  10. 10
    Design of 0.5V, 1.28mW CMOS UWB mixer using the body effect

    Design of 0.5V, 1.28mW CMOS UWB mixer using the body effect by Tavassoli, M., Kargaran, E., Izadpanah Tous, Saber, Nabovati, H.

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  11. 11
    An ultra low-voltage, ultra low-power CMOS mixer using the body effect

    An ultra low-voltage, ultra low-power CMOS mixer using the body effect by Zoka, Negar, Kargaran, Ehsan, Nabovati, Ghazal, Nabovati, Hooman

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  12. 12
    New linearization method for low voltage, low power folded cascode LNAs

    New linearization method for low voltage, low power folded cascode LNAs by Zavarei, M. J., Kargaran, E., Nabovati, H.

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  13. 13
    Gain increasing techniques for CMOS folded cascode LNAs at low voltage and low power operations

    Gain increasing techniques for CMOS folded cascode LNAs at low voltage and low power operations by Kargaran, E., Baghbanmanesh, M. R., Ravari, M. M., Soltani, A., Mafinezhad, K., Nabovati, H.

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  14. 14
    An ultra low voltage ultra high gain CMOS LNA using forward body biasing technique

    An ultra low voltage ultra high gain CMOS LNA using forward body biasing technique by Kargaran, E., Nabovati, G., Baghbanmanesh, M. R., Mafinezhad, K., Nabovati, H.

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  15. 15
    Design of a novel dual-band concurrent CMOS LNA with current reuse topology

    Design of a novel dual-band concurrent CMOS LNA with current reuse topology by Kargaran, Ehsan, Madadi, Bahman

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  16. 16
    A 1.5 v High Swing Ultra-Low-Power Two Stage CMOS OP-AMP in 0.18 µm Technology

    A 1.5 v High Swing Ultra-Low-Power Two Stage CMOS OP-AMP in 0.18 µm Technology by Kargaran, Ehsan, Khosrowjerdi, Hojat, Ghaffarzadegan, Karim

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  17. 17
    Design of high gain CMOS LNA with improved linearity using modified derivative superposition

    Design of high gain CMOS LNA with improved linearity using modified derivative superposition by Zavarei, M. J., Kargaran, E., Nabovati, H.

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  18. 18
    Design of low-voltage low-power Dual-Band LNA with using DS method to improve linearity

    Design of low-voltage low-power Dual-Band LNA with using DS method to improve linearity by Dehqan, A. R., Kenarroodi, M., Kargaran, E., Mafinezhad, K.

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  19. 19
    An ultra low voltage ultra low power folded cascode CMOS LNA using forward body bias technology for GPS application

    An ultra low voltage ultra low power folded cascode CMOS LNA using forward body bias technology for GPS application by Kargaran, Ehsan, Nabovati, Ghazal, Mafinezhad, Khalil, Nabovati, Hooman

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  20. 20
    Design of new full adder cell using hybrid-CMOS logic style

    Design of new full adder cell using hybrid-CMOS logic style by Zavarei, M. J., Baghbanmanesh, M. R., Kargaran, E., Nabovati, H., Golmakani, A.

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