Search Results - Kasha, D.B.

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  1. 1
    A 2.5-Gb/s Multi-Rate 0.25-[Formula Omitted]m CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition

    A 2.5-Gb/s Multi-Rate 0.25-[Formula Omitted]m CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition by Perrott, M.H, Huang, Yunteng, Baird, R.T, Garlepp, B.W, Pastorello, D, King, E.T, Yu, Qicheng, Kasha, D.B, Steiner, P, Zhang, Ligang, Hein, J, Del Signore, B

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  2. 2
    A 2.5-Gb/s Multi-Rate 0.25- \mum CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition

    A 2.5-Gb/s Multi-Rate 0.25- \mum CMOS Clock and Data Recovery Circuit Utilizing a Hybrid Analog/Digital Loop Filter and All-Digital Referenceless Frequency Acquisition by Perrott, M.H., Yunteng Huang, Baird, R.T., Garlepp, B.W., Pastorello, D., King, E.T., Qicheng Yu, Kasha, D.B., Steiner, P., Ligang Zhang, Hein, J., Del Signore, B.

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  3. 3
    A 16-mW, 120-dB linear switched-capacitor delta-sigma modulator with dynamic biasing

    A 16-mW, 120-dB linear switched-capacitor delta-sigma modulator with dynamic biasing by Kasha, D.B., Lee, W.L., Thomsen, A.

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  4. 4
    A 110-dB-THD, 18-mW DAC using sampling of the output and feedback to reduce distortion

    A 110-dB-THD, 18-mW DAC using sampling of the output and feedback to reduce distortion by Thomsen, A., Kasha, D.B., Wang, L., Lee, W.L.

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  5. 5
    A 126 dB linear switched-capacitor delta-sigma modulator

    A 126 dB linear switched-capacitor delta-sigma modulator by Kerth, D.A., Kasha, D.B., Mellissinos, T.G., Piasecki, D.S., Swanson, E.J.

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