Search Results - Katopis, G.A

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  1. 1
    Design methodology of high performance on-chip global interconnect using terminated transmission-line

    Design methodology of high performance on-chip global interconnect using terminated transmission-line by Yulei Zhang, Ling Zhang, Deutsch, A., Katopis, G.A., Dreps, D.M., Buckwalter, J.F., Kuh, E.S., Chung-Kuan Cheng

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  2. 2
    High-end server system partitioning for cost reduction

    High-end server system partitioning for cost reduction by Katopis, G.A., Tingdong Zhou, Thornton, M.

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  3. 3
    T-Rex, a blade packaging architecture for mainframe servers

    T-Rex, a blade packaging architecture for mainframe servers by Katopis, G.A., Becker, W.D., Harrer, H.H.

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  4. 4
    Evolution of organic chip packaging technology for high speed applications

    Evolution of organic chip packaging technology for high speed applications by Klink, E., Garben, B., Huber, A., Kaller, D., Grivet-Talocia, S., Katopis, G.A.

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  5. 5
    Delta-I noise specification for a high-performance computing machine

    Delta-I noise specification for a high-performance computing machine by Katopis, G.A.

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  6. 6
    Low power passive equalizer optimization using tritonic step response

    Low power passive equalizer optimization using tritonic step response by Zhang, Ling, Yu, Wenjian, Zhu, Haikun, Deutsch, Alina, Katopis, George A., Dreps, Daniel M., Kuh, Ernest, Cheng, Chung-Kuan

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  7. 7
    MCM-D/C packaging solution for IBM latest S/390 servers

    MCM-D/C packaging solution for IBM latest S/390 servers by Perfecto, E.D., Shields, R.R., Malhotra, A.K., Jeanneret, M.P., McHerron, D.C., Katopis, G.A.

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  8. 8
    Operating frequency trends for high performance off-chip buses

    Operating frequency trends for high performance off-chip buses by Katopis, G.A.

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  9. 9
    Feature - From chips to systems via packaging - A comparison of IBM's mainframe servers

    Feature - From chips to systems via packaging - A comparison of IBM's mainframe servers by Harrer, H., Katopis, G.A., Becker, W.

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  10. 10
    An analysis on measurement sensitivity of Short-Pulse Propagation technique using a virtual test bench

    An analysis on measurement sensitivity of Short-Pulse Propagation technique using a virtual test bench by Zhen Zhou, Deutsch, A., Melde, K.L., Katopis, G.A., Morsey, J.D.

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  11. 11
    Low Power Passive Equalizer Design for Computer Memory Links

    Low Power Passive Equalizer Design for Computer Memory Links by Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Deutsch, A., Katopis, G.A., Dreps, D.M., Buckwalter, J., Kuh, E., Chung-Kuan Cheng

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  12. 12
    On-chip bus signaling using passive compensation

    On-chip bus signaling using passive compensation by Yulei Zhang, Ling Zhang, Deutsch, A., Katopis, G.A., Dreps, D.M., Buckwalter, J.F., Kuh, E.S., Chung-Kuan Cheng

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  13. 13
    High-end server system partitioning for cost reduction

    High-end server system partitioning for cost reduction by Katopis, G.A., Zhou, T.

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  14. 14
    Modeling, simulation, and measurement of mid-frequency simultaneous switching noise in computer systems

    Modeling, simulation, and measurement of mid-frequency simultaneous switching noise in computer systems by Becker, W.D., Eckhardt, J., Frech, R.W., Katopis, G.A., Klink, E., McAllister, M.F., McNamara, T.G., Muench, P., Richter, S.R., Smith, H.

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  15. 15
    Applications of closed-form wiring escape formulae to a high performance printed wiring board

    Applications of closed-form wiring escape formulae to a high performance printed wiring board by Tingdong Zhou, Katopis, G.A.

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  16. 16
    Coupled noise predictors for lossy interconnects

    Coupled noise predictors for lossy interconnects by Katopis, G.A., Smith, H.

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  17. 17
    S/390 cost performance considerations for MCM packaging choices

    S/390 cost performance considerations for MCM packaging choices by Katopis, G.A., Becker, W.D.

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  18. 18
    Package and chip design optimization for mid-frequency power distribution decoupling

    Package and chip design optimization for mid-frequency power distribution decoupling by Garben, B., Katopis, G.A., Becker, W.A.

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  19. 19
    Evolution of Organic Chip Packaging Technology forHigh Speed Applications

    Evolution of Organic Chip Packaging Technology forHigh Speed Applications by Klink, E., Garben, B., Huber, A., Kaller, D., Grivet-Talocia, S., Katopis, G.A.

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  20. 20
    T-REX, a blade packaging architecture for mainframe servers

    T-REX, a blade packaging architecture for mainframe servers by Katopis, G.A., Becker, W.D., Harrer, H.

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