Search Results - Kertis, R.A.

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  1. 1
    A 20 GS/s 5-Bit SiGe BiCMOS Dual-Nyquist Flash ADC With Sampling Capability up to 35 GS/s Featuring Offset Corrected Exclusive-Or Comparators

    A 20 GS/s 5-Bit SiGe BiCMOS Dual-Nyquist Flash ADC With Sampling Capability up to 35 GS/s Featuring Offset Corrected Exclusive-Or Comparators by Kertis, R.A., Humble, J.S., Daun-Lindberg, M.A., Philpott, R.A., Fritz, K.E., Schwab, D.J., Prairie, J.F., Gilbert, B.K., Daniel, E.S.

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  2. 2
    A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm bulk CMOS

    A 20Gb/s SerDes transmitter with adjustable source impedance and 4-tap feed-forward equalization in 65nm bulk CMOS by Philpott, R.A., Humble, J.S., Kertis, R.A., Fritz, K.E., Gilbert, B.K., Daniel, E.S.

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  3. 3
    A 12-ns ECL I/O 256 K1-bit SRAM using a 1- mu m BiCMOS technology

    A 12-ns ECL I/O 256 K1-bit SRAM using a 1- mu m BiCMOS technology by Kertis, R.A., Smith, D.D., Bowman, T.L.

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  4. 4
    A 35 GS/s 5-Bit SiGe BiCMOS flash ADC with offset corrected exclusive-or comparator

    A 35 GS/s 5-Bit SiGe BiCMOS flash ADC with offset corrected exclusive-or comparator by Kertis, R.A., Humble, J.S., Daun-Lindberg, M.A., Philpott, R.A., Fritz, K.A., Schwab, D.J., Prairie, J.F., Gilbert, B.K., Daniel, E.S.

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  5. 5
    A 7 Mbyte/s (65 MHz), mixed-signal, magnetic recording channel DSP using partial response signaling with maximum likelihood detection

    A 7 Mbyte/s (65 MHz), mixed-signal, magnetic recording channel DSP using partial response signaling with maximum likelihood detection by Philpott, R.A., Kertis, R.A., Richetta, R.A., Schmerbeck, T.J., Schulte, D.J.

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  6. 6
    A 16 MB/s PRML read/write data channel

    A 16 MB/s PRML read/write data channel by Richetta, R.A., Goetschel, C.J., Greene, R.A., Kertis, R.A., Philpott, R.A., Schmerbeck, T.J., Schulte, D.J., Swart, D.P.

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  7. 7
    A 60 ns 256Kx1 bit DRAM using LD/SUP 3/ technology and double-level metal interconnection

    A 60 ns 256Kx1 bit DRAM using LD/SUP 3/ technology and double-level metal interconnection by Kertis, R.A., Fitzpatrick, K.J., Ohri, K.B.

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