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Search Results - Khvatov, Vasilii M.
Search Results - Khvatov, Vasilii M.
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Post-Route Performance Estimation Method for Reconfigurable Systems-on-a-Chip
by
Gavrilov, Sergey V.
,
Khvatov, Vasilii M.
,
Zheleznikov, Daniil A.
,
Garbulina, Tatiana V.
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Development of a Method for Timing Analysis of Reconfigurable System-on-a-Chip Based on Models of Special Logic Elements
by
Telpukhov, Dmitry V.
,
Solovyev, Roman A.
,
Rukhlov, Vladimir S.
,
Khvatov, Vasilii M.
,
Mikhmel, Artem S.
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Method for Determining the Optimal Composition of a Reduced Standard Cell Library for FPGA
by
Khvatov, Vasilii M.
,
Zheleznikov, Daniil A.
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Development of an IP-cores Libraries as Part of the Design Flow of Integrated Circuits on FPGA
by
Khvatov, Vasilii M.
,
Zheleznikov, Daniil A.
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The Rip-up and Reroute Technique Research for Island-Style Reconfigurable System-on-Chip
by
Zapletina, Mariya A.
,
Zheleznikov, Daniil A.
,
Khvatov, Vasilii M.
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Analysis of the Programmable Soft IP-cores Implementation for FPGAs
by
Khvatov, Vasilii M.
,
Zheleznikov, Daniil A.
,
Gavrilov, Sergey V.
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Electronic Engineering
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Field Programmable Gate Arrays
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Fpga
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Libraries
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Routing
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Circuit Design
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Engineering
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Engineering, Electrical & Electronic
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Field-Programmable Gate Array
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Logic Gates
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Rsoc
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Science & Technology
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Technology
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Clustering
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Computer Simulation
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Integrated Circuit
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Ieee Electronic Library (Iel) Conference Proceedings
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Ieee Xplore All Conference Series
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Ieee Electronic Library (Iel) Standards
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