Search Results - Khvatov, Vasilii M.

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  1. 1
    Post-Route Performance Estimation Method for Reconfigurable Systems-on-a-Chip

    Post-Route Performance Estimation Method for Reconfigurable Systems-on-a-Chip by Gavrilov, Sergey V., Khvatov, Vasilii M., Zheleznikov, Daniil A., Garbulina, Tatiana V.

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  2. 2
    Development of a Method for Timing Analysis of Reconfigurable System-on-a-Chip Based on Models of Special Logic Elements

    Development of a Method for Timing Analysis of Reconfigurable System-on-a-Chip Based on Models of Special Logic Elements by Telpukhov, Dmitry V., Solovyev, Roman A., Rukhlov, Vladimir S., Khvatov, Vasilii M., Mikhmel, Artem S.

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  3. 3
    Method for Determining the Optimal Composition of a Reduced Standard Cell Library for FPGA

    Method for Determining the Optimal Composition of a Reduced Standard Cell Library for FPGA by Khvatov, Vasilii M., Zheleznikov, Daniil A.

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  4. 4
    Development of an IP-cores Libraries as Part of the Design Flow of Integrated Circuits on FPGA

    Development of an IP-cores Libraries as Part of the Design Flow of Integrated Circuits on FPGA by Khvatov, Vasilii M., Zheleznikov, Daniil A.

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  5. 5
    The Rip-up and Reroute Technique Research for Island-Style Reconfigurable System-on-Chip

    The Rip-up and Reroute Technique Research for Island-Style Reconfigurable System-on-Chip by Zapletina, Mariya A., Zheleznikov, Daniil A., Khvatov, Vasilii M.

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  6. 6
    Analysis of the Programmable Soft IP-cores Implementation for FPGAs

    Analysis of the Programmable Soft IP-cores Implementation for FPGAs by Khvatov, Vasilii M., Zheleznikov, Daniil A., Gavrilov, Sergey V.

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