Search Results - Ki-Chang Kwean

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  1. 1
    A Low Power High Performance Register-Controlled Digital DLL for 2Gbps x32 GDDR SDRAM

    A Low Power High Performance Register-Controlled Digital DLL for 2Gbps x32 GDDR SDRAM by Hyun-Woo Lee, Won-Joo Yun, Sin-Deok Kang, Hyung-Wook Moon, Seung-Wook Kwack, Dong-Uk Lee, Ki-Chang Kwean, Kwan-Weon Kim, Young-Jung Choi, Jin-Hong Ahn, Joong-Sik Kih

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  2. 2
    A 5.2Gb/p/s GDDR5 SDRAM with CML clock distribution network

    A 5.2Gb/p/s GDDR5 SDRAM with CML clock distribution network by KyungHoon Kim, SangSic Yoon, KiChang Kwean, DaeHan Kwon, SunSuk Yang, MunPhil Park, YongKi Kim, ByongTae Chung

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  3. 3
    A Low Power Digital DLL with Wide Locking Range for 3Gbps 512Mb GDDR3 SDRAM

    A Low Power Digital DLL with Wide Locking Range for 3Gbps 512Mb GDDR3 SDRAM by Won-Joo Yun, Hyun-Woo Lee, Young-Ju Kim, Won-Jun Choi, Sang-Hoon Shin, Hyang-Hwa Choi, Hyeng-Ouk Lee, Shin-Deok Kang, Hyong-Uk Moon, Seung-Wook Kwack, Dong-Uk Lee, Jung-Woo Lee, Young-Kyoung Choi, Nak-Kyu Park, Ki-Chang Kwean, Kwan-Weon Kim, Young-Jung Choi, Jin-Hong Ahn, Joong-Sik Kih, Ye-Seok Yang

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  4. 4
    A 2.5Gb/s/pin 256Mb GDDR3 SDRAM with Series Pipelined CAS Latency Control and Dual-Loop Digital DLL

    A 2.5Gb/s/pin 256Mb GDDR3 SDRAM with Series Pipelined CAS Latency Control and Dual-Loop Digital DLL by Dong Uk Lee, Hyun Woo Lee, Ki Chang Kwean, Young Kyoung Choi, Hyong Uk Moon, Seung Wook Kwack, Shin Deok Kang, Kwan Weon Kim, Yong Ju Kim, Young Jung Choi, Moran, P., Jin Hong Ahn, Joong Sik Kih

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