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A Process-Aware Analytical Gate Resistance Model for Nanosheet Field-Effect Transistors
by
Suk, Junha
,
Kim, Yohan
,
Do, Jungho
,
Kim, Garoom
,
Rim, Woojin
,
Baek, Sanghoon
,
Yoon, Seiseung
,
Kim, Soyoung
Published in
IEEE journal of the Electron Devices Society
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Analytical Parasitic Resistance and Capacitance Models for Nanosheet Field-Effect Transistors
by
Suk, JunHa
,
Kim, YoHan
,
Do, JungHo
,
Kim, GaRoom
,
Baek, SangHoon
,
Kye, JongWook
,
Kim, SoYoung
Published in
IEEE transactions on electron devices
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Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process
by
Yang, Giyoung
,
Jung, Hakchul
,
Lim, Jinyoung
,
Seo, Jaewoo
,
Kim, Ingyum
,
Yu, Jisu
,
You, Hyeoungyu
,
Kong, Jeongsoon
,
Kim, Garoom
,
Jeong, Minjae
,
Park, Chanhee
,
An, Sera
,
Rim, Woojin
,
Kim, Hayoung
,
Lee, Dalhee
,
Baek, Sanghoon
,
Jung, Jonghoon
,
Song, Taejoong
,
Kye, Jongwook
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Ieee Journal Of The Electron Devices Society
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