Search Results - Kim, Kee Sup

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  1. 1
    X-compact: an efficient response compaction technique

    X-compact: an efficient response compaction technique by Mitra, S., Kee Sup Kim

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  2. 2
    Robust system design with built-in soft-error resilience

    Robust system design with built-in soft-error resilience by Mitra, S., Seifert, N., Zhang, M., Shi, Q., Kim, K.S.

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  3. 3
    Built-In Soft Error Resilience for Robust System Design

    Built-In Soft Error Resilience for Robust System Design by Mitra, S., Ming Zhang, Seifert, N., Mak, T.M., Kee Sup Kim

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  4. 4
    Sequential Element Design With Built-In Soft Error Resilience

    Sequential Element Design With Built-In Soft Error Resilience by Ming Zhang, Mitra, S., Mak, T.M., Seifert, N., Wang, N.J., Quan Shi, Kee Sup Kim, Shanbhag, N.R., Patel, S.J.

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  5. 5
    Combinational Logic Soft Error Correction

    Combinational Logic Soft Error Correction by Mitra, S., Ming Zhang, Waqas, S., Seifert, N., Gill, B., Kee Sup Kim

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  6. 6
    X-compact: an efficient response compaction technique for test cost reduction

    X-compact: an efficient response compaction technique for test cost reduction by Mitra, S., Kee Sup Kim

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  7. 7
    Early-life-failure detection using SAT-based ATPG

    Early-life-failure detection using SAT-based ATPG by Sauer, Matthias, Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung-Tae Do, Jung Yun Choi, Kee Sup Kim, Mitra, Subhasish, Becker, Bernd

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  8. 8
    Development of thermal neutron SER-resilient high-k/metal gate technology

    Development of thermal neutron SER-resilient high-k/metal gate technology by Jongwoo Park, Gunrae Kim, Ming Zhang, Kyungsik Park, Miji Lee, Ilgon Kim, Jongsun Bae, Sangwoo Pae, Jinwoo Choi, Dongsuk Shin, Nae-In Lee, Kee Sup Kim

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  9. 9
    Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics

    Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics by Young Moon Kim, Jun Seomun, Hyung-Ock Kim, Kyung-Tae Do, Jung Yun Choi, Kee Sup Kim, Sauer, Matthias, Becker, Bernd, Mitra, Subhasish

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  10. 10
    Hierarchical Test Compression for SoC Designs

    Hierarchical Test Compression for SoC Designs by Kim, Kee Sup, Zhang, Ming

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  11. 11
    Framework for massively parallel testing at wafer and package test

    Framework for massively parallel testing at wafer and package test by Baba, A.H., Kee Sup Kim

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  12. 12
    A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology

    A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology by Suk-Soo Pyo, Jun-Sung Kim, Jung-Han Kim, Hyun-Taek Jung, Tae-Joong Song, Cheol-Ha Lee, Gyu-Hong Kim, Young-Keun Lee, Kee-Sup Kim

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  13. 13
    Logic soft errors: a major barrier to robust platform design

    Logic soft errors: a major barrier to robust platform design by Mitra, S., Ming Zhang, Mak, T.M., Seifert, N., Zia, V., Kee Sup Kim

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  14. 14
    XMAX: a practical and efficient compression architecture

    XMAX: a practical and efficient compression architecture by Kee Sup Kim

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  15. 15
    Delay defect characteristics and testing strategies

    Delay defect characteristics and testing strategies by Kee Sup Kim, Mitra, S., Ryan, P.G.

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  16. 16
    XPAND: an efficient test stimulus compression technique

    XPAND: an efficient test stimulus compression technique by Mitra, S., Kim, K.S.

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  17. 17
    Panel 4A: Apprentice - VTS edition: Season 3

    Panel 4A: Apprentice - VTS edition: Season 3 by Kim, Kee Sup

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  18. 18
    Panel 12C: Apprentice - VTS edition judging session

    Panel 12C: Apprentice - VTS edition judging session by Kim, Kee Sup

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  19. 19
    Apprentice - VTS edition: Season 4

    Apprentice - VTS edition: Season 4 by Kee Sup Kim, Roy, R

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  20. 20
    Panel: Apprentice - VTS Edition: Season 2

    Panel: Apprentice - VTS Edition: Season 2 by Kim, Kee Sup

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