Search Results - Knijnenburg, P.M.W.

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  1. 1
    Predictable performance in SMT processors: synergy between the OS and SMTs

    Predictable performance in SMT processors: synergy between the OS and SMTs by Cazorla, F.J., Knijnenburg, P.M.W., Sakellariou, R., Fernandez, E., Ramirez, A., Valero, M.

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  2. 2
    QoS for high-performance SMT processors in embedded systems

    QoS for high-performance SMT processors in embedded systems by Cazorla, F.J., Ramirez, A., Valero, M., Knijnenburg, P.M.W., Sakellariou, R., Fernandez, E.

    Published in IEEE MICRO
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  3. 3
    Combined selection of tile sizes and unroll factors using iterative compilation

    Combined selection of tile sizes and unroll factors using iterative compilation by Kisuki, T., Knijnenburg, P.M.W., O'Boyle, M.F.P.

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  4. 4
    Automatic selection of compiler options using non-parametric inferential statistics

    Automatic selection of compiler options using non-parametric inferential statistics by Haneda, M., Knijnenburg, P.M.W., Wijshoff, H.A.G.

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  5. 5
    Integrating Loop and Data Transformations for Global Optimization

    Integrating Loop and Data Transformations for Global Optimization by O'Boyle, M.F.P., Knijnenburg, P.M.W.

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  6. 6
    Feasibility of Combined Area and Performance Optimization for Superscalar Processors Using Random Search

    Feasibility of Combined Area and Performance Optimization for Superscalar Processors Using Random Search by van Haastregt, S., Knijnenburg, P.M.W.

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  7. 7
    Statistical selection of compiler options

    Statistical selection of compiler options by Pinkers, R.P.J., Knijnenburg, P.M.W., Haneda, M., Wijshoff, H.A.G.

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  8. 8
    Efficient parallelisation using combined loop and data transformations

    Efficient parallelisation using combined loop and data transformations by O'Boyle, M.F.P., Knijnenburg, P.M.W.

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  9. 9
    Integrating loop and data transformations for global optimisation

    Integrating loop and data transformations for global optimisation by O'Boyle, M.F.P., Knijnenburg, P.M.W.

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  10. 10
    On the impact of data input sets on statistical compiler tuning

    On the impact of data input sets on statistical compiler tuning by Haneda, M., Knijnenburg, P.M.W., Wijshoff, H.A.G.

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  11. 11
    On the Problem of Minimizing Workload Execution Time in SMT Processors

    On the Problem of Minimizing Workload Execution Time in SMT Processors by Cazorla, F.J., Knijnenburg, P.M.W., Sakellariou, R., Fernandez, E., Ramirez, A., Valero, M.

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  12. 12
    Branch classification to control instruction fetch in simultaneous multithreaded architectures

    Branch classification to control instruction fetch in simultaneous multithreaded architectures by Knijnenburg, P.M.W., Ramirez, A., Latorre, F., Larriba, J., Valero, M.

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  13. 13
    Implicit vs. explicit resource allocation in SMT processors

    Implicit vs. explicit resource allocation in SMT processors by Cazorla, F.J., Knijnenburg, P.M.W., Sakellariou, R., Fernandez, E., Ramirez, A., Valero, M.

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