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Search Results - Kommangunta, Venkatesh
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A Design of 44.1 fJ/Conv-Step 12-Bit 80 ms/s Time Interleaved Hybrid Type SAR ADC With Redundancy Capacitor and On-Chip Time-Skew Calibration
by
Verma, Deeksha
,
Rikan, Behnam S.
,
Shehzad, Khuram
,
Kim, Sung Jin
,
Khan, Danial
,
Kommangunta, Venkatesh
,
Shah, Syed Adil Ali
,
Pu, Younggun
,
Yoo, Sang-Sun
,
Hwang, Keum Cheol
,
Yang, Youngoo
,
Lee, Kang-Yoon
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Low-Power Light-Weight Binary Phase Shift Keying Demodulator for Magnetic Field Communications
by
Kommangunta, Venkatesh
,
Shehzad, Khuram
,
Verma, Deeksha
,
Lee, Kang-Yoon
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A Design of Low-Power Dynamic Latch Comparator with Adaptive Power Control for12-bit Charge Sharing SAR ADCs
by
Azam, Ali
,
Kommangunta, Venkatesh
,
Lee, Jung-Hyun
,
Lee, Kang-Yoon
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