Search Results - Kosemura, Kinjiro

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  1. 1
    Additivity of the quantized conductance of multiple parallel quantum point contacts

    Additivity of the quantized conductance of multiple parallel quantum point contacts by SCHMIDT, P. E, OKADA, M, KOSEMURA, K, YOKOYAMA, N

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  2. 2
    Room temperature operation of Si single-electron memory with self-aligned floating dot gate

    Room temperature operation of Si single-electron memory with self-aligned floating dot gate by Nakajima, Anri, Futatsugi, Toshiro, Kosemura, Kinjiro, Fukano, Tetsu, Yokoyama, Naoki

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  3. 3
    Si single electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process

    Si single electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process by Nakajima, Anri, Futatsugi, Toshiro, Kosemura, Kinjiro, Fukano, Tetsu, Yokoyama, Naoki

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  4. 4
    Short-channel effects in subquarter-micrometer-gate HEMTs: simulation and experiment

    Short-channel effects in subquarter-micrometer-gate HEMTs: simulation and experiment by Awano, Y., Kosugi, M., Kosemura, K., Mimura, T., Abe, M.

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  5. 5
    Cost-effective 60-GHz Modules with A Post-wall Planar Antenna for Gigabit Home-link Systems

    Cost-effective 60-GHz Modules with A Post-wall Planar Antenna for Gigabit Home-link Systems by Nakano, Hiroshi, Kosemura, Kinjiro, Hamada, Tomoko, Hirachi, Yasutake, Hirokawa, Jiro, Ando, Makoto

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  6. 6
    Cost-effective 60-GHz modules with a post-wall planar antenna for gigabit home-link systems

    Cost-effective 60-GHz modules with a post-wall planar antenna for gigabit home-link systems by Nakano, H., Kosemura, K., Hamada, T., Hirachi, Y., Hirokawa, J., Ando, M.

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  7. 7
    Si single-electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process

    Si single-electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process by Nakajima, Anri, Futatsugi, Toshiro, Kosemura, Kinjiro, Fukano, Tetsu, Yokoyama, Naoki

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  8. 8
    A Packaged 20-GHz 1-W GaAs MESFET with a Novel Via-Hole Plated Heat Sink Structure

    A Packaged 20-GHz 1-W GaAs MESFET with a Novel Via-Hole Plated Heat Sink Structure by Hirachi, Y., Takeuchi, Y., Igarashi, M., Kosemura, K., Yamamoto, S.

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  9. 9
    Room temperature operation of Si single-electron memory with self-aligned floating dot gate

    Room temperature operation of Si single-electron memory with self-aligned floating dot gate by Nakajima, A., Futatsugi, T., Kosemura, K., Fukano, T., Yokoyama, N.

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