Search Results - Kulak, Georgiy

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    In-Memory Fault as Address Simulation

    In-Memory Fault as Address Simulation by Gharibi, Wajeb, Chumachenko, Svetlana, Miroshnyk, Maryna, Abashidze, Marina, Litvinova, Eugenia, Kulak, Georgiy, Hahanov, Vladimir, Mishchenko, Alexander

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    Assertion Based Design of Timed Finite State Machine

    Assertion Based Design of Timed Finite State Machine by Shkil, Alexander, Miroshnyk, Anatolii, Kulak, Georgiy, Pshenychnyi, Kyrylo

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