Search Results - Kwon, UiHui

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  1. 1
    In0.53Ga0.47As-Based nMOSFET Design for Low Standby Power Applications

    In0.53Ga0.47As-Based nMOSFET Design for Low Standby Power Applications by Bhuwalka, Krishna K., Zhenhua Wu, Hyeon-Kyun Noh, Wonsok Lee, Cantoro, Mirco, Yeon-Cheol Heo, Seonghoon Jin, Woosung Choi, Uihui Kwon, Maeda, Shigenobu, Keun-Ho Lee, Young-Kwan Park

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  2. 2
    Investigation of HCI reliability in interdigitated LDMOS

    Investigation of HCI reliability in interdigitated LDMOS by Kyuheon Cho, Seonghoon Ko, Machida, Fumie, Jaeho Kim, Jaejune Jang, Uihui Kwon, Keun-Ho Lee, Youngkwan Park

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  3. 3
    Layout-induced stress effects on the performance and variation of FinFETs

    Layout-induced stress effects on the performance and variation of FinFETs by Lee, Choongmok, Kang, Hyun-Chul, Min, Jeong Guk, Kim, Jongchol, Kwon, Uihui, Lee, Keun-Ho, Park, Youngkwan

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  4. 4
    Surface scattering impact on Si/TiSi2 contact resistance

    Surface scattering impact on Si/TiSi2 contact resistance by Vuttivorakulchai, Kantawong, Pourghaderi, Mohammad Ali, Kim, Gwang-Jun, Song, Seunghyun, Kim, Yoon-Suk, Kwon, Uihui, Kim, Dae Sin

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  5. 5
    Switchable Chemical‐Bond Reorganization for the Stable Charge Trapping in Amorphous Silicon Nitride

    Switchable Chemical‐Bond Reorganization for the Stable Charge Trapping in Amorphous Silicon Nitride by Choi, Woon Ih, Son, Won‐Joon, Dronskowski, Richard, Oh, Youngtek, Yang, Seung‐Yeul, Kwon, Uihui, Kim, Dae Sin

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  6. 6
    Simulation-based study on characteristics of dual vertical transfer gates in sub-micron pixels for CMOS image sensors

    Simulation-based study on characteristics of dual vertical transfer gates in sub-micron pixels for CMOS image sensors by Lee, Wook, Ko, Seonghoon, Kim, Jae Ho, Kim, Yoon-Suk, Kwon, Uihui, Kim, HyunChul, Kim, Dae Sin

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  7. 7
    Optimization of Photodiode Design Through Analysis of Full-Well Capacity and Image Lag in 0.5 μm CMOS Image Sensors With Vertical Transfer Gates

    Optimization of Photodiode Design Through Analysis of Full-Well Capacity and Image Lag in 0.5 μm CMOS Image Sensors With Vertical Transfer Gates by Park, Jae Hyeon, Suk, Chan Hee, Kim, Sungchul, Kim, Jae Ho, Kwon, Uihui, Kim, Dae Sin, Yoo, Keon-Ho, Kim, Tae Whan

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  8. 8
    Critical Backscattering Length in Nanotransistors

    Critical Backscattering Length in Nanotransistors by Pourghaderi, M. Ali, Pham, Anh-Tuan, Park, Hong-Hyun, Jin, Seonghoon, Vuttivorakulchai, Kantawong, Park, Yonghee, Kwon, Uihui, Choi, Woosung, Kim, Dae Sin

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  9. 9
    TCAD challenges and opportunities to find a feasible device architecture for sub-3nm scaling

    TCAD challenges and opportunities to find a feasible device architecture for sub-3nm scaling by Kwon, Uihui, Park, Yonghee, Kim, Yoon-Suk, Yoo, Jaehyun, Kim, Dae Sin

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  10. 10
    Potential Engineering to Enhance Transfer Characteristics of Advanced CIS Pixel based on VTG - FDTI scheme

    Potential Engineering to Enhance Transfer Characteristics of Advanced CIS Pixel based on VTG - FDTI scheme by Kim, Sungchul, Kim, Jae Ho, Kwon, UiHui, Lee, Kyungho, Kim, Dae Sin

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  11. 11
    Machine-Learning based TCAD Optimization Method for Next Generation BCD Process Development

    Machine-Learning based TCAD Optimization Method for Next Generation BCD Process Development by Yoo, Jaehyun, Jeon, Yongwoo, Jung, Dawon, Kim, Junhyuk, Ryu, Jisu, Kwon, UiHui, Kim, Dae Sin, Kim, Kwangtae, Kim, Yongdon, Lee, Kyuok, Jung, Jeahyun, kwon, Ohkyum

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  12. 12
    Ballisticity Saturation by Unscalable Reflections

    Ballisticity Saturation by Unscalable Reflections by Pourghaderi, M. Ali, Ilatikhameneh, Hesameddin, Pham, Anh-Tuan, Park, Hong-Hyun, Lim, Jinyoung, Jiang, Zhengping, Wang, Jing, Jin, Seonghoon, Kim, Jongchol, Kwon, Uihui, Chung, Won-Young, Choi, Woosung, Kim, Dae Sin

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  13. 13
    Gummel-cycle Algebraic Multigrid Preconditioning for Large-scale Device Simulations

    Gummel-cycle Algebraic Multigrid Preconditioning for Large-scale Device Simulations by Koshimoto, Hiroo, Ishimabushi, Hisashi, Yoo, Jaehyun, Kayama, Yasuyuki, Yamada, Satoru, Kwon, Uihui, Kim, Dae Sin

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  14. 14
    Considerations for DD Simulation at Cryogenic Temperature

    Considerations for DD Simulation at Cryogenic Temperature by Jin, Seonghoon, Pham, Anh-Tuan, Choi, Woosung, Pourghaderi, Mohammad Ali, Kwon, Uihui, Kim, Dae Sin

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  15. 15
    Impact of BEOL Design on Self-heating and Reliability in Highly-scaled FinFETs

    Impact of BEOL Design on Self-heating and Reliability in Highly-scaled FinFETs by Choi, Jaehee, Monga, Udit, Park, Yonghee, Shim, Hyewon, Kwon, Uihui, Pae, Sangwoo, Kim, Dae Sin

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  16. 16
    First-principle Extraction of Surface Roughness in Si/Oxide Interfaces

    First-principle Extraction of Surface Roughness in Si/Oxide Interfaces by Vuttivorakulchai, Kantawong, Pourghaderi, Mohammad Ali, Kwon, Uihui, Voros, Marton, Lee, Byounghak, Jin, Seonghoon, Park, Yonghee, Choi, Woosung, Kim, Dae Sin

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  17. 17
    Novel Optimization Method using Machine-learning for Device and Process Competitiveness of BCD Process

    Novel Optimization Method using Machine-learning for Device and Process Competitiveness of BCD Process by Kim, Junhyeok, Yoo, Jae-Hyun, Jung, Jaehyun, Kim, Kwangtea, Bae, Jaehyun, Kim, Yoon-suk, Kwon, OhKyum, Kwon, UiHui, Kim, DaeSin

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  18. 18
    Negative-Capacitance FETs for Advanced Nodes: Circuit Performance and Variability Analysis with Ferroelectric Dynamic Switching

    Negative-Capacitance FETs for Advanced Nodes: Circuit Performance and Variability Analysis with Ferroelectric Dynamic Switching by Lin, Yen-Kai, Wang, Jing, Okagaki, Takeshi, Jin, Seonghoon, Pham, Anh-Tuan, Park, Yonghee, Kwon, Uihui, Choi, Woosung, Kim, Dae Sin

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  19. 19
    NEGF simulations of stacked silicon nanosheet FETs for performance optimization

    NEGF simulations of stacked silicon nanosheet FETs for performance optimization by Park, Hong-Hyun, Choi, Woosung, Pourghaderi, Mohammad Ali, Kim, Jongchol, Kwon, Uihui, Kim, Dae Sin

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  20. 20
    Toward more realistic NEGF simulations of vertically stacked multiple SiNW FETs

    Toward more realistic NEGF simulations of vertically stacked multiple SiNW FETs by Park, Hong-Hyun, Choi, Woosung, Pourghaderi, Mohammad Ali, Kim, Jongchol, Kwon, Uihui, Kim, Dae Sin

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