Search Results - Lajolo, Marcello

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  1. 1
    Hardware Scheduling Support in SMP Architectures

    Hardware Scheduling Support in SMP Architectures by Nacul, Andre C., Regazzoni, Francesco, Lajolo, Marcello

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  2. 2
    Bus guardians: an effective solution for online detection and correction of faults affecting system-on-chip buses

    Bus guardians: an effective solution for online detection and correction of faults affecting system-on-chip buses by Lajolo, M.

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  3. 3
    Variation tolerant NoC design by means of self-calibrating links

    Variation tolerant NoC design by means of self-calibrating links by Simone, M., Lajolo, M., Bertozzi, D.

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  4. 4
    Cosimulation-based power estimation for system-on-chip design

    Cosimulation-based power estimation for system-on-chip design by Lajolo, M., Raghunathan, A., Dey, S., Lavagno, L.

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  5. 5
    In Memoriam: Margarida F. Jacome

    In Memoriam: Margarida F. Jacome by Veciana, Gustavo De, Lajolo, Marcello, He, Chen, Macii, Enrico, Sapatnekar, Sachin

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  6. 6
    Hardware scheduling support in SMP architectures

    Hardware scheduling support in SMP architectures by Nácul, André C., Regazzoni, Francesco, Lajolo, Marcello

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  7. 7
    Efficient power co-estimation techniques for system-on-chip design

    Efficient power co-estimation techniques for system-on-chip design by Lajolo, M., Raghunathan, A., Dey, S., Lavagno, L.

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  8. 8
    Early evaluation of bus interconnects dependability for system-on-chip designs

    Early evaluation of bus interconnects dependability for system-on-chip designs by Lajolo, M., Reorda, M.S., Violante, M.

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  9. 9
    Variation tolerant NoC design by means of self-calibrating links

    Variation tolerant NoC design by means of self-calibrating links by Simone, Medardoni, Lajolo, Marcello, Bertozzi, Davide

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  10. 10
    Hardware scheduling support in SMP architectures

    Hardware scheduling support in SMP architectures by Nacul, Andre C, Regazzoni, Francesco, Lajolo, Marcello

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  11. 11
    On the evaluation of fairness for input queue switches

    On the evaluation of fairness for input queue switches by Cavendish, D., Lajolo, M., Hongbo Liu

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  12. 12
    On the support of minimum service rates for input queue switches

    On the support of minimum service rates for input queue switches by Cavendish, D., Lajolo, M., Hongbo Liu

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  13. 13
    Software timing analysis using HW/SW cosimulation and instruction set simulator

    Software timing analysis using HW/SW cosimulation and instruction set simulator by Liu, Jie, Lajolo, Marcello, Sangiovanni-Vincentelli, Alberto

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  14. 14
    A compilation-based software estimation scheme for hardware/software co-simulation

    A compilation-based software estimation scheme for hardware/software co-simulation by Lajolo, Marcello, Lazarescu, Mihai, Sangiovanni-Vincentelli, Alberto

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  15. 15
    Efficient power estimation techniques for HW/SW systems

    Efficient power estimation techniques for HW/SW systems by Lajolo, M., Raghunathan, A., Dey, S., Lavagno, L., Sangiovanni-Vincentelli, A.

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  16. 16
    A case study on modeling shared memory access effects during performance analysis of HW/SW systems

    A case study on modeling shared memory access effects during performance analysis of HW/SW systems by Lajolo, Marcello, Raghunathan, Anand, Dey, Sujit, Lavagno, Luciano, Sangiovanni-Vincentelli, Alberto

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