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A high-performance ROM compiler for 0.50 /spl mu/m and 0.36 /spl mu/m CMOS technologies
by
Barry, R.L.
,
Chickanosky, J.D.
,
Masci, F.M.
,
Piro, R.A.
,
Oakland, S.E.
,
Ouellette, M.R.
,
Kemerer, D.W.
,
Noack, M.R.
,
Leipoid, W.C.
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Application Specific Integrated Circuits
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Built-In Self-Test
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Clocks
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Cmos Technology
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Decoding
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Integrated Circuit Interconnections
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