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A 12-nm Autonomous Driving Processor With 60.4 TOPS, 13.8 TOPS/W CNN Executed by Task-Separated ASIL D Control
by
Matsubara, Katsushige
,
Lieske, Hanno
,
Kimura, Motoki
,
Nakamura, Atsushi
,
Koike, Manabu
,
Morikawa, Shun
,
Hotta, Yoshihiko
,
Irita, Takahiro
,
Mochizuki, Seiji
,
Hamasaki, Hiroyuki
,
Kamei, Tatsuya
Published in
IEEE journal of solid-state circuits
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4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control
by
Matsubara, Katsushige
,
Hanno, Lieske
,
Kimura, Motoki
,
Nakamura, Atsushi
,
Koike, Manabu
,
Terashima, Kazuaki
,
Morikawa, Shun
,
Hotta, Yoshihiko
,
Irita, Takahiro
,
Mochizuki, Seiji
,
Hamasaki, Hiroyuki
,
Kamei, Tatsuya
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Efficient data transfer operations for a SIMD processor array system
by
Lieske, H.
,
Kyo, S.
,
Nomoto, S.
,
Torii, S.
,
Kobayashi, Y.
,
Ninomiya, Y.
,
Okazaki, S.
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A 1.3-GOPS parallel DSP for high-performance image-processing applications
by
Hinrichs, W.
,
Wittenburg, J.P.
,
Lieske, H.
,
Kloos, H.
,
Ohmacht, M.
,
Pirsch, P.
Published in
IEEE journal of solid-state circuits
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Realization of a programmable parallel DSP for high performance image processing applications
by
Wittenburg, Jens Peter
,
Hinrichs, Willm
,
Kneip, Johannes
,
Ohmacht, Martin
,
Bereković, Mladen
,
Lieske, Hanno
,
Kloos, Helge
,
Pirsch, Peter
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Software MPEG-2 video decoder on a 200-MHz, low-power multimedia microprocessor
by
Nadehara, K.
,
Lieske, H.
,
Kuroda, I.
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Hipar-DSP-a scalable family of high performance DSP-cores
by
Wittenburg, J.P.
,
Hinrichs, W.
,
Lieske, H.
,
Kloos, H.
,
Friebe, L.
,
Pirsch, P.
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