Search Results - Lin, Chorng-Jung

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  1. 1
    A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors

    A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors by Wei-Hao Chen, Kai-Xiang Li, Wei-Yu Lin, Kuo-Hsiang Hsu, Pin-Yi Li, Cheng-Han Yang, Cheng-Xin Xue, En-Yu Yang, Yen-Kai Chen, Yun-Sheng Chang, Tzu-Hsiang Hsu, Ya-Chin King, Chorng-Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang

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  2. 2
    An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory

    An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory by Meng-Fan Chang, Shin-Jang Shen, Chia-Chi Liu, Che-Wei Wu, Yu-Fan Lin, Ya-Chin King, Chorng-Jung Lin, Hung-Jen Liao, Yu-Der Chih, Yamauchi, Hiroyuki

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  3. 3
    A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro

    A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro by CHANG, Meng-Fan, WU, Che-Wei, KUO, Chia-Cheng, SHEN, Shin-Jang, YANG, Sue-Meng, LIN, Ku-Feng, SHEN, Wen-Chao, KING, Ya-Chin, LIN, Chorng-Jung, CHIH, Yu-Der

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  4. 4
    Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme

    Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme by Meng-Fan Chang, Chia-Chen Kuo, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Chen, Frederick T., Tzu-Kun Ku, Ming-Jinn Tsai, Jui-Jen Wu, Yue-Der Chih

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  5. 5
    24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors

    24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors by Xue, Cheng-Xin, Chen, Wei-Hao, Liu, Je-Syu, Li, Jia-Fang, Lin, Wei-Yu, Lin, Wei-En, Wang, Jing-Hong, Wei, Wei-Chen, Chang, Ting-Wei, Chang, Tung-Cheng, Huang, Tsung-Yuan, Kao, Hui-Yao, Wei, Shih-Ying, Chiu, Yen-Cheng, Lee, Chun-Ying, Lo, Chung-Chuan, King, Ya-Chin, Lin, Chorng-Jung, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

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  6. 6
    19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme

    19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme by Meng-Fan Chang, Jui-Jen Wu, Tun-Fei Chien, Yen-Chen Liu, Ting-Chin Yang, Wen-Chao Shen, Ya-Chin King, Chorng-Jung Lin, Ku-Feng Lin, Yu-Der Chih, Natarajan, Sreedhar, Chang, Jonathan

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  7. 7
    A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time

    A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time by Meng-Fan Chang, Che-Wei Wu, Chia-Cheng Kuo, Shin-Jang Shen, Ku-Feng Lin, Shu-Meng Yang, Ya-Chin King, Chorng-Jung Lin, Yu-Der Chih

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  8. 8
    An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory

    An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory by Meng-Fan Chang, Shin-Jang Shen, Chia-Chi Liu, Che-Wei Wu, Yu-Fan Lin, Shang-Chi Wu, Chia-En Huang, Han-Chao Lai, Ya-Chin King, Chorng-Jung Lin, Hung-Jen Liao, Yu-Der Chih, Yamauchi, Hiroyuki

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  9. 9
    Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) cell and read-disturb-free temperature-aware current-mode read scheme

    Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) cell and read-disturb-free temperature-aware current-mode r... by Meng-Fan Chang, Chia-Cheng Kuo, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Zhe-Hui Lin, Keng-Li Su, Yu-Sheng Chen, Wen-Pin Lin, Heng-Yuan Lee, Chen-Han Tsai, Wei-Su Chen, Chen, Frederick T., Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai, Jui-Jen Wu, Yu-Der Chih, Natarajan, Sreedhar

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  10. 10
    A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips

    A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips by Meng-Fan Chang, Che-Wei Wu, Jui-Yu Hung, Ya-Chin King, Chorng-Jung Lin, Mon-Shu Ho, Chia-Cheng Kuo, Shyh-Shyuan Sheu

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  11. 11
    Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) Cell and read-disturb-free temperature-aware current-mode read scheme

    Area-efficient embedded RRAM macros with sub-5ns random-read-access-time using logic-process parasitic-BJT-switch (0T1R) Cell and read-disturb-free temperature-aware current-mode r... by Meng-Fan Chang, Chia-Cheng Kuo, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Zhe-Hui Lin, Keng-Li Su, Yu-Sheng Chen, Wen-Pin Lin, Heng-Yuan Lee, Chen-Han Tsai, Wei-Su Chen, Chen, Frederick T., Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai, Jui-Jen Wu, Yu-Der Chih, Natarajan, Sreedhar

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