Search Results - Man Pio Lam

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  1. 1
    8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm

    8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm by Xu, Danfeng, Kou, Yu, Lai, Paul, Cheng, Zichuan, Cheung, Tze Yin, Moser, Larry, Zhang, Yang, Liu, Xiaolong, Lam, Man Pio, Jia, Haikun, Pan, Quan, Szeto, Wing Hong, Tang, Chi Fai, Mak, Ka Fai, Sarfraz, Khawar, Zhu, Tairan, Kwan, Ming, Au, Emily Yim Lee, Conroy, Cormac, Chan, Kai Keung

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  2. 2
    Recent progress of submicron CMOS using 6H-SiC for smart power applications

    Recent progress of submicron CMOS using 6H-SiC for smart power applications by Man Pio Lam, Kornegay, K.T.

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  3. 3
    Punchthrough behavior in short channel NMOS and PMOS 6H-silicon carbide transistors at elevated temperatures

    Punchthrough behavior in short channel NMOS and PMOS 6H-silicon carbide transistors at elevated temperatures by Man Pio Lam, Kornegay, K.T.

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  4. 4
    Planar 6H-SiC MESFETs with vanadium implanted channel termination

    Planar 6H-SiC MESFETs with vanadium implanted channel termination by Man Pio Lam, Kornegay, K.T., Cooper, J.A., Melloch, M.R.

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