Search Results - McGaughy, Bruce

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  1. 1
    Design tools for reliability analysis

    Design tools for reliability analysis by Liu, Zhihong, McGaughy, Bruce W., Ma, James Z.

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  2. 2
    Second-Order Balanced Truncation for Passive-Order Reduction of RLCK Circuits

    Second-Order Balanced Truncation for Passive-Order Reduction of RLCK Circuits by Boyuan Yan, Tan, S.X.-D., McGaughy, B.

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  3. 3
    ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis

    ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis by Duo Li, Tan, S.X.-D., McGaughy, B.

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  4. 4
    TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits

    TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits by Pu Liu, Tan, S.X.-D., McGaughy, B., Lifeng Wu, Lei He

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  5. 5
    Design tools for reliability analysis

    Design tools for reliability analysis by Zhihong Liu, McGaughy, B.W., Ma, J.Z.

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  6. 6
    DeMOR: decentralized model order reduction of linear networks with massive ports

    DeMOR: decentralized model order reduction of linear networks with massive ports by Yan, Boyuan, Zhou, Lingfei, Tan, Sheldon X.-D., Chen, Jie, McGaughy, Bruce

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  7. 7
    An efficient terminal and model order reduction algorithm

    An efficient terminal and model order reduction algorithm by Liu, Pu, Tan, Sheldon X.-D., Yan, Boyuan, McGaughy, Bruce

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  8. 8
    An Essentially Non-Oscillatory (ENO) high-order accurate Adaptive table model for device modeling

    An Essentially Non-Oscillatory (ENO) high-order accurate Adaptive table model for device modeling by Yang, Baolin, McGaughy, Bruce

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  9. 9
    SBPOR: second-order balanced truncation for passive order reduction of RLC circuits

    SBPOR: second-order balanced truncation for passive order reduction of RLC circuits by Yan, Boyuan, Tan, Sheldon X.-D., Liu, Pu, McGaughy, Bruce

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  10. 10
    Advanced simulation technology and its application in memory design and verification

    Advanced simulation technology and its application in memory design and verification by McGaughy, B., Wuensche, S., Hung, K.K.

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  11. 11
    A simple method for on-chip, sub-femto Farad interconnect capacitance measurement

    A simple method for on-chip, sub-femto Farad interconnect capacitance measurement by McGaughy, B.W., Chen, J.C., Sylvester, D., Chenming Hu

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  12. 12
    The energy efficiency of IRAM architectures

    The energy efficiency of IRAM architectures by Fromm, Richard, Perissakis, Stylianos, Cardwell, Neal, Kozyrakis, Christoforos, McGaughy, Bruce, Patterson, David, Anderson, Tom, Yelick, Katherine

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  13. 13
    ETBR: extended truncated balanced realization method for on-chip power grid network analysis

    ETBR: extended truncated balanced realization method for on-chip power grid network analysis by Li, Duo, Tan, Sheldon X.-D., McGaughy, Bruce

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  14. 14
    Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form

    Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form by Boyuan Yan, Tan, S.X.-D., Pu Liu, McGaughy, B.

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  15. 15
    An efficient method for terminal reduction of interconnect circuits considering delay variations

    An efficient method for terminal reduction of interconnect circuits considering delay variations by Pu Liu, Tan, S.X.-D., Hang Li, Zhenyu Qi, Jun Kong, McGaughy, B., Lei He

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  16. 16
    An Extended SVD-based Terminal and Model Order Reduction Algorithm

    An Extended SVD-based Terminal and Model Order Reduction Algorithm by Pu Liu, Tan, S.X.-D., Yan, B., McGaughy, B.

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  17. 17
    Passive Modeling of Interconnects by Waveform Shaping

    Passive Modeling of Interconnects by Waveform Shaping by Boyuan Yan, Pu Liu, Tan, S.X.-D., McGaughy, B.

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  18. 18
    Compact Reduced Order Modeling for Multiple-Port Interconnects

    Compact Reduced Order Modeling for Multiple-Port Interconnects by Liu, Pu, Tan, Sheldon X. -D., McGaughy, Bruce, Wu, Lifeng

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  19. 19
    An on-chip, attofarad interconnect charge-based capacitance measurement (CBCM) technique

    An on-chip, attofarad interconnect charge-based capacitance measurement (CBCM) technique by Chen, J.C., McGaughy, B.W., Sylvester, D., Chenming Hu

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  20. 20
    An efficient method for terminal reduction of interconnect circuits considering delay variations

    An efficient method for terminal reduction of interconnect circuits considering delay variations by Liu, Pu, Tan, S. X. -D., Li, Hang, Qi, Zhenyu, Kong, Jun, McGaughy, B., He, Lei

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