Trends in the ultimate breakdown strength of high dielectric-constant materials by McPherson, J.W., Jinyoung Kim, Shanware, A., Mogul, H., Rodriguez, J.

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Time dependent dielectric breakdown physics – Models revisited by McPherson, J.W.

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Reliability challenges for 45nm and beyond by McPherson, J. W.

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Reliability Trends with Advanced CMOS Scaling and The Implications for Design by McPherson, J.W.

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Quantum Mechanical Treatment of Si-O Bond Breakage in Silica Under Time Dependent Dielectric Breakdown Testing by McPherson, J.W.

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Modeling of Interconnect Dielectric Lifetime Under Stress Conditions and New Extrapolation Methodologies for Time-Dependent Dielectric Breakdown by Haase, G.S., McPherson, J.W.

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Time Dependent Dielectric Breakdown Characteristics of Low-k Dielectric (SiOC) Over a Wide Range of Test Areas and Electric Fields by Jinyoung Kim, Ogawa, E.T., McPherson, J.W.

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Stress-induced voiding under vias connected to wide Cu metal leads by Ogawa, E.T., McPherson, J.W., Rosal, J.A., Dickerson, K.J., Chiu, T.-C., Tsung, L.Y., Jain, M.K., Bonifield, T.D., Ondrusek, J.C., McKee, W.R.

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Breakdown characteristics of interconnect dielectrics by Haase, G.S., Ogawa, E.T., McPherson, J.W.

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A Statistical Evaluation of the Field Acceleration Parameter Observed During Time Dependent Dielectric Breakdown Testing of Silica-Based Low-k Interconnect Dielectrics by Jinyoung Kim, Ogawa, E.T., McPherson, J.W.

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A complementary molecular-model (including field and current) for TDDB in SiO 2 dielectrics by McPherson, J.W., Khamankar, R.B., Shanware, A.

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A complementary molecular-model (including field and current) for TDDB in SiO2 dielectrics by McPherson, J.W., Khamankar, R.B., Shanware, A.

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Leakage and breakdown reliability issues associated with low-k dielectrics in a dual-damascene Cu process by Tsu, R., McPherson, J.W., McKee, W.R.

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Gate Dielectric Integrity along the Road Map of CMOS Scaling including Multi-Gate Fet, TiN Metal Gate, and HfSiON High-k Gate Dielectric by Pompl, T., Mogul, H.C., Kerber, M., Haase, G., Ogawa, E., McPherson, J.W., Xiong, W., Schulz, T., Schrufer, K., Cleavelin, R.

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Electromigration reliability improvement of W-plug vias by titanium layering by Graas, C.D., Le, H.A., McPherson, J.W., Havemann, R.H.

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Building-in reliability into VLSI junctions by Mogul, H.C., McPherson, J.W., Parrill, T.M.

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Disturbed bonding states in SiO/sub 2/ thin-films and their impact on time-dependent dielectric breakdown by McPherson, J.W., Mogul, H.C.

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Scaling-induced reductions in CMOS reliability margins and the escalating need for increased design-in reliability efforts by McPherson, J.W.

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Reliability challenges for deep submicron interconnects by McPherson, J.W., Le, H.A., Graas, C.D.

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Does building-in reliability imply more or less wafer-level reliability testing? by McPherson, J.W.

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