Search Results - Mirmotahari, O.

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  1. 1
    A novel D-latch in multiple-valued semi-floating-gate recharged logic

    A novel D-latch in multiple-valued semi-floating-gate recharged logic by Mirmotahari, O., Berg, Y.

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  2. 2
    A novel multiple-input multiple-valued semi-floating-gate latch

    A novel multiple-input multiple-valued semi-floating-gate latch by Mirmotahari, O., Berg, Y.

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  3. 3
    Basic multiple-valued functions using recharge CMOS logic

    Basic multiple-valued functions using recharge CMOS logic by Berg, Y., Aunet, S., Noess, O., Mirmotahari, O.

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  4. 4
    Robust low-power CMOS precharge logic

    Robust low-power CMOS precharge logic by Mirmotahari, O., Berg, Y.

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  5. 5
    Ultra low-voltage and high speed dynamic and static CMOS precharge logic

    Ultra low-voltage and high speed dynamic and static CMOS precharge logic by Berg, Y., Mirmotahari, O.

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  6. 6
    Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror

    Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror by Berg, Y., Mirmotahari, O.

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  7. 7
    Clocked semi-floating-gate ultra low-voltage inverting current mirror

    Clocked semi-floating-gate ultra low-voltage inverting current mirror by Berg, Y., Mirmotahari, O.

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  8. 8
    Clocked semi-floating-gate ultra low-voltage current mirror

    Clocked semi-floating-gate ultra low-voltage current mirror by Berg, Y., Mirmotahari, O., Aunet, S.

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  9. 9
    Low voltage precharge CMOS logic

    Low voltage precharge CMOS logic by Berg, Y., Mirmotahari, O.

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  10. 10
    Ultra low-voltage switched current mirror

    Ultra low-voltage switched current mirror by Berg, Y., Mirmotahari, O.

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  11. 11
    High Speed Ultra Low Voltage CMOS inverter

    High Speed Ultra Low Voltage CMOS inverter by Berg, Y., Mirmotahari, O., Lomsdalen, J.G., Aunet, S.

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  12. 12
    Ultra low voltage and, nor and XOR CMOS gates

    Ultra low voltage and, nor and XOR CMOS gates by Berg, Y., Mirmotahari, O., Aunet, S.

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  13. 13
    High speed and ultra low voltage CMOS latch

    High speed and ultra low voltage CMOS latch by Berg, Y., Mirmotahari, O., Aunet, S.

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  14. 14
    A Continuous MVL Gate using Pseudo Floating-Gate

    A Continuous MVL Gate using Pseudo Floating-Gate by Mirmotahari, O., Lomsdalen, J., Berg, Y.

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  15. 15
    Pseudo Floating-Gate Inverter with Feedback Control

    Pseudo Floating-Gate Inverter with Feedback Control by Berg, Y., Mirmotahari, O., Aunet, S.

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  16. 16
    Band Pass Pseudo Floating-Gate Amplifier

    Band Pass Pseudo Floating-Gate Amplifier by Berg, Y., Azadmehr, M., Mirmotahari, O., Aunet, S.

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  17. 17
    Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integrator

    Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integrator by Azadmehr, M., Berg, Y., Mirmotahari, O.

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  18. 18
    Ultra low voltage CMOS gates

    Ultra low voltage CMOS gates by Berg, Y., Mirmotahari, O., Per Norseng, P., Aunet, S.

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