Search Results - Miyase, Kohei

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  1. 1
    Fault-Aware Dependability Enhancement Techniques for Phase Change Memory

    Fault-Aware Dependability Enhancement Techniques for Phase Change Memory by Lu, Shyue-Kung, Li, Hui-Ping, Miyase, Kohei, Hsu, Chun-Lung, Sun, Chi-Tien

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  2. 2
    Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments

    Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments by Yan, Aibin, Feng, Xiangfeng, Hu, Yuanjie, Lai, Chaoping, Cui, Jie, Chen, Zhili, Miyase, Kohei, Wen, Xiaoqing

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  3. 3
    Clock-Skew-Aware Scan Chain Grouping for Mitigating Shift Timing Failures in Low-Power Scan Testing

    Clock-Skew-Aware Scan Chain Grouping for Mitigating Shift Timing Failures in Low-Power Scan Testing by Zhang, Yucong, Wen, Xiaoqin, Holst, Stefan, Miyase, Kohei, Kajihara, Seiji, Wunderlich, Hans-Joachim, Qian, Jun

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  4. 4
    Scan Chain Grouping for Mitigating IR-Drop-Induced Test Data Corruption

    Scan Chain Grouping for Mitigating IR-Drop-Induced Test Data Corruption by Yucong Zhang, Holst, Stefan, Xiaoqing Wen, Miyase, Kohei, Kajihara, Seiji, Jun Qian

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  5. 5
    Low Power BIST for Scan-Shift and Capture Power

    Low Power BIST for Scan-Shift and Capture Power by Sato, Y., Senling Wang, Kato, T., Miyase, K., Kajihara, S.

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  6. 6
    Search Space Reduction for Low-Power Test Generation

    Search Space Reduction for Low-Power Test Generation by Miyase, Kohei, Sauer, Matthias, Becker, Berund, Wen, Xiaoqing, Kajihara, Seiji

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  7. 7
    A Practical Online Error Detection Method for Functional Safety Using Three-Site Implications

    A Practical Online Error Detection Method for Functional Safety Using Three-Site Implications by Loki, Kazuya, Kai, Yasuyuki, Miyase, Kohei, Kajihara, Seiji

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  8. 8
    A Scan-Out Power Reduction Method for Multi-cycle BIST

    A Scan-Out Power Reduction Method for Multi-cycle BIST by Senling Wang, Sato, Y., Miyase, K., Kajihara, S.

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  9. 9
    Analyzing Running Form with Acceleration Sensor

    Analyzing Running Form with Acceleration Sensor by Koga, Chihiro, Miyase, Kohei, Tokui, Masato

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  10. 10
    Fine-Grained Built-In Self-Repair Techniques for NAND Flash Memories

    Fine-Grained Built-In Self-Repair Techniques for NAND Flash Memories by Lu, Shyue-Kung, Tseng, Shi-Chun, Miyase, Kohei

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  11. 11
    A Highly-Guided X-Filling Method for Effective Low-Capture-Power Scan Test Generation

    A Highly-Guided X-Filling Method for Effective Low-Capture-Power Scan Test Generation by Xiaoqing Wen, Miyase, K., Suzuki, T., Yamato, Y., Kajihara, S., Laung-Terng Wang, Saluja, K.K.

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  12. 12
    Fault Resilience Techniques for Flash Memory of DNN Accelerators

    Fault Resilience Techniques for Flash Memory of DNN Accelerators by Lu, Shyue-Kung, Wu, Yu-Sheng, Hong, Jin-Hua, Miyase, Kohei

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  13. 13
    XID: Don't care identification of test patterns for combinational circuits

    XID: Don't care identification of test patterns for combinational circuits by Miyase, K., Kajihara, S.

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  14. 14
    Progressive ECC Techniques for Phase Change Memory

    Progressive ECC Techniques for Phase Change Memory by Lu, Shyue-Kung, Li, Hui-Ping, Miyase, Kohei

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  15. 15
    Formal Test Point Insertion for Region-based Low-Capture-Power Compact At-Speed Scan Test

    Formal Test Point Insertion for Region-based Low-Capture-Power Compact At-Speed Scan Test by Eggersgluss, Stephan, Holst, Stefan, Tille, Daniel, Miyase, Kohei, Wen, Xiaoqing

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  16. 16
    Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM

    Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM by Lu, Shyue-Kung, Huang, Hung-Kai, Hsu, Chun-Lung, Sun, Chi-Tien, Miyase, Kohei

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  17. 17
    Soft-error tolerant TCAMs for high-reliability packet classifications

    Soft-error tolerant TCAMs for high-reliability packet classifications by Syafalni, Infall, Sasao, Tsutomu, Xiaoqing Wen, Holst, Stefan, Miyase, Kohei

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  18. 18
    Analysis and mitigation or IR-Drop induced scan shift-errors

    Analysis and mitigation or IR-Drop induced scan shift-errors by Holst, Stefan, Schneider, Eric, Kawagoe, Koshi, Kochte, Michael A., Miyase, Kohei, Wunderlich, Hans-Joachim, Kajihara, Seiji, Xiaoqing Wen

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  19. 19
    On Optimal Power-Aware Path Sensitization

    On Optimal Power-Aware Path Sensitization by Sauer, Matthias, Jie Jiang, Reimer, Sven, Miyase, Kohei, Xiaoqing Wen, Becker, Bernd, Polian, Ilia

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  20. 20
    Power Supply Noise Reduction for At-Speed Scan Testing in Linear-Decompression Environment

    Power Supply Noise Reduction for At-Speed Scan Testing in Linear-Decompression Environment by Meng-Fan Wu, Jiun-Lang Huang, Xiaoqing Wen, Miyase, K.

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