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Search Results - Moerschel, K.G.
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A high performance super self-aligned 3 V/5 V BiCMOS technology with extremely low parasitics for low-power mixed-signal applications
by
Sung, J.M.
,
Chiu, T.-Y.
,
Lau, K.
,
Liu, T.M.
,
Archer, V.D.
,
Razavi, B.
,
Swartz, R.G.
,
Erceg, F.M.
,
Glick, J.T.
,
Hower, G.R.
,
Krafty, S.A.
,
LaDuca, A.J.
,
Ling, M.P.
,
Moerschel, K.G.
,
Possanza, W.A.
,
Prozonic, M.A.
,
Long, T.P.
Published in
IEEE transactions on electron devices
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Optimization of collector-substrate capacitance for mixed signal low power BiCMOS
by
Sung, J.M.
,
Chiu, T.Y.
,
Lau, K.
,
Liu, T.M.
,
Archer, V.D.
,
Razavi, B.
,
Swartz, R.G.
,
Erceg, F.M.
,
Ling, M.P.
,
Moerschel, K.G.
,
Prozonic, M.A.
,
Long, T.P.
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BEST2-a high performance super self-aligned 3 V/5 V BiCMOS technology with extremely low parasitics for low-power mixed-signal applications
by
Sung, J.M.
,
Chui, T.Y.
,
Lau, K.
,
Lui, T.M.
,
Archer, V.D.
,
Razavi, B.
,
Swartz, R.G.
,
Erceg, F.M.
,
Glick, J.T.
,
Hower, G.R.
,
Krafty, S.A.
,
LaDuca, A.J.
,
Ling, M.P.
,
Moerschel, K.G.
,
Possanza, W.A.
,
Prozonic, M.A.
,
Long, T.P.
Request full text
Conference Proceeding
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Ieee Transactions On Electron Devices
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Bicmos Integrated Circuits
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Capacitance
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Delay
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