Search Results - Nair, Gopikrishnan Raveendran

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    FPGA Acceleration of GCN in Light of the Symmetry of Graph Adjacency Matrix

    FPGA Acceleration of GCN in Light of the Symmetry of Graph Adjacency Matrix by Nair, Gopikrishnan Raveendran, Suh, Han-Sok, Halappanavar, Mahantesh, Liu, Frank, Seo, Jae-sun, Cao, Yu

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    AI Computing in Light of 2.5D Interconnect Roadmap: Big-Little Chiplets for In-memory Acceleration

    AI Computing in Light of 2.5D Interconnect Roadmap: Big-Little Chiplets for In-memory Acceleration by Wang, Zhenyu, Nair, Gopikrishnan Raveendran, Krishnan, Gokul, Mandal, Sumit K., Cherian, Ninoo, Seo, Jae-Sun, Chakrabarti, Chaitali, Ogras, Umit Y., Cao, Yu

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