Search Results - Nakazawa, Yoetsu

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  1. 1
    A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications

    A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications by Takeda, K., Hagihara, Y., Aimoto, Y., Nomura, M., Nakazawa, Y., Ishii, T., Kobatake, H.

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  2. 2
    Delay and power monitoring schemes for minimizing power consumption by means of supply and threshold voltage control in active and standby modes

    Delay and power monitoring schemes for minimizing power consumption by means of supply and threshold voltage control in active and standby modes by Nomura, M., Ikenaga, Y., Takeda, K., Nakazawa, Y., Aimoto, Y., Hagihara, Y.

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  3. 3
    A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations

    A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations by Ikenaga, Y., Nomura, M., Nakazawa, Y., Hagihara, Y.

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  4. 4
    A 20-Gb/s CMOS multichannel transmitter and receiver chip set for ultra-high-resolution digital displays

    A 20-Gb/s CMOS multichannel transmitter and receiver chip set for ultra-high-resolution digital displays by Fukaishi, M., Nakamura, K., Heiuchi, H., Hirota, Y., Nakazawa, Y., Ikeno, H., Hayama, H., Yotsuyanagi, M.

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  5. 5
    A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking

    A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking by Mizuno, M., Ooi, Y., Hayashi, N., Goto, J., Hozumi, M., Furuta, K., Shibayama, A., Nakazawa, Y., Ohnishi, O., Shu-Yu Zhu, Yokoyama, Y., Katayama, Y., Takano, H., Miki, N., Senda, Y., Tamitani, I., Yamashina, M.

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  6. 6
    Delay and Power Monitoring Scheme for Minimizing Power Consumption by Means of Supply and Threshold Voltage Control

    Delay and Power Monitoring Scheme for Minimizing Power Consumption by Means of Supply and Threshold Voltage Control by Nomura, M., Ikenaga, Y., Takeda, K., Nakazawa, Y., Aimoto, Y., Hagihara, Y.

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  7. 7
    1.5 W single-chip MPEG2 MPML encoder with low-power motion estimation and clocking

    1.5 W single-chip MPEG2 MPML encoder with low-power motion estimation and clocking by Mizuno, Masayuki, Ooi, Yasushi, Hayashi, Naoya, Goto, Junichi, Hozumi, Masatoshi, Furuta, Koichiro, Nakazawa, Yoetsu, Ohnishi, Osamu, Yokoyama, Yutaka, Katayama, Yoichi, Takano, Hideto, Miki, Noriyuki, Senda, Yuzo, Tamitani, Ichiro, Yamashina, Masakazu

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  8. 8
    Fast voltage control scheme with adaptive voltage control steps and temporary reference voltage overshoots for dynamic voltage and frequency scaling

    Fast voltage control scheme with adaptive voltage control steps and temporary reference voltage overshoots for dynamic voltage and frequency scaling by Ikenaga, Y., Nomura, M., Nakazawa, Y., Hayashi, Y.

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  9. 9
    An Optimal Supply Voltage Determiner Circuit for Minimum Energy Operations

    An Optimal Supply Voltage Determiner Circuit for Minimum Energy Operations by Ikenaga, Y., Nomura, M., Nakazawa, Y., Hagihara, Y.

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  10. 10
    Monitoring scheme for minimizing power consumption by means of supply and threshold voltage control in active and standby modes

    Monitoring scheme for minimizing power consumption by means of supply and threshold voltage control in active and standby modes by Nomura, M., Ikenaga, Y., Takeda, K., Nakazawa, Y., Aimoto, Y., Hagihara, Y.

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