An 18-Mb, 12.3-GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin by Cangsang Zhao, Bhattacharya, U., Denham, M., Kolonsek, J., Lu, Y., Yong-Gee Ng, Nintunze, N., Sarkez, K., Varadarajan, H.D.

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Hole drift velocity in the warped band model of GaAs by Nintunze, N, Osman, M A

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Ultrafast energy loss of electrons in p -GaAs by Rodrigues-Herzog, R., Sailer, M., Hecker, N. E., Höpfel, R. A., Nintunze, N., Osman, M. A.

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Dynamically screened electron-hole interaction effects on initial thermalization of photoexcited carriers in p+-GaAs by Nintunze, N, Osman, M A

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Carrier-carrier interaction effects on transient valley repopulation and velocity in silicon by Osman, M A, Nintunze, N, Imam, M

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Dynamically screened electron-hole interaction effects on initial thermalization of photoexcited carriers in p super(+)-GaAs by Nintunze, N, Osman, M A

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Ultrafast relaxation of highly photoexcited carriers in p-type and intrinsic GaAs by Nintunze, N, Osman, MA

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Programmable impulse neural circuits by Meador, J.L., Wu, A., Cole, C., Nintunze, N., Chintrakulchai, P.

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VLSI-implementable classically conditioned neural elements by Nintunze, N., Wu, A., Chintrakulchai, P., Meador, J.

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A Register File with 8.4GHz Throughput for Efficient Instruction Scheduling in a Pentium~ 4 Processor by Nintunze, N., Giao Pham

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An 18 Mb, 12.3 GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin by Cangsang Zhao, Bhattacharya, U., Denham, M., Kolousek, J., Yi Lu, Yong-Gee Ng, Nintunze, N., Sarkez, K., Varadarajan, H.

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VLSI implementation of a pulse Hebbian learning law by Meador, J., Watola, D., Nintunze, N.

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