Application specific processor design: Architectures, design methods and tools by Nohl, A, Schirrmeister, F, Taussig, D

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A universal technique for fast and flexible instruction-set architecture simulation by Nohl, A., Braun, G., Schliebusch, O., Leupers, R., Meyr, H., Hoffmann, A.

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A novel methodology for the design of application-specific instruction-set processors (ASIPs) using a machine description language by Hoffmann, A., Kogel, T., Nohl, A., Braun, G., Schliebusch, O., Wahlen, O., Wieferink, A., Meyr, H.

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A universal technique for fast and flexible instruction-set architecture simulation by Braun, G., Nohl, A., Hoffmann, A., Schliebusch, O., Leupers, R., Meyr, H.

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A universal technique for fast and flexible instruction-set architecture simulation by Nohl, Achim, Braun, Gunnar, Schliebusch, Oliver, Leupers, Rainer, Meyr, Heinrich, Hoffmann, Andreas

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A system level processor/communication co-exploration methodology for multi-processor system-on-chip platforms by Wieferink, A., Kogel, T., Leupers, R., Ascheid, G., Meyr, H., Braun, G., Nohl, A.

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System prototypes: virtual, hardware or hybrid? by Borgstrom, Tom, Haritan, Eshel, Wilson, Ron, Abada, David, Dauman, Andrew, Chandra, Ramesh, Mielo, Olivier, Cruse, Chuck, Nohl, Achim

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Programming MPSoC platforms: Road works ahead by Leupers, R., Vajda, A., Bekooij, M., Soonhoi Ha, Domer, R., Nohl, A.

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A survey on modeling issues using the machine description language LISA by Hoffmann, A., Nohl, A., Braun, G., Meyr, H.

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Multicore design is the challenge! what is the solution? by Haritan, Eshel, Hattori, Toshihiro, Yagi, Hiroyuki, Paulin, Pierre, Wolf, Wayne, Nohl, Achim, Wingard, Drew, Muller, Mike

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RTL processor synthesis for architecture exploration and implementation by Schliebusch, O., Chattopadhyay, A., Leupers, R., Ascheid, G., Meyr, H., Steinert, M., Braun, G., Nohl, A.

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Generating production quality software development tools using a machine description language by Hoffmann, A., Nohl, A., Pees, S., Braun, G., Meyr, H.

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A novel approach for flexible and consistent ADL-driven ASIP design by Braun, Gunnar, Nohl, Achim, Sheng, Weihua, Ceng, Jianjiang, Hohenauer, Manuel, Scharwächter, Hanno, Leupers, Rainer, Meyr, Heinrich

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Processor/memory co-exploration on multiple abstraction levels by Braun, G., Wieferink, A., Schliebusch, O., Leupers, R., Meyr, H., Nohl, A.

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Processor/Memory Co-Exploration on Multiple Abstraction Levels by Braun, Gunnar, Wieferink, Andreas, Schliebusch, Oliver, Leupers, Rainer, Meyr, Heinrich, Nohl, Achim

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A methodology for the design of application specific instruction set processors (ASIP) using the machine description language LISA by Hoffmann, A., Schliebusch, O., Nohl, A., Braun, G., Wahlen, O., Meyr, H.

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Application Specific Processing: A Tools Approach by Taussig, Drew, Hoffmann, Andreas, Nohl, Achim, Kroll, Andrea

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Retargetable generation of TLM bus interfaces for MP-SoC platforms by Wieferink, Andreas, Leupers, Rainer, Ascheid, Gerd, Meyr, Heinrich, Michiels, Tom, Nohl, Achim, Kogel, Tim

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Architecture Implementation Using the Machine Description Language LISA by Schliebusch, Oliver, Hoffmann, Andreas, Nohl, Achim, Braun, Gunnar, Meyr, Heinrich

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Using static scheduling techniques for the retargeting of high speed, compiled simulators for embedded processors from an abstract machine description by Braun, Gunnar, Hoffmann, Andreas, Nohl, Achim, Meyr, Heinrich

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