Search Results - Owaida, M.

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  1. 1
    Implementation and Performance Comparison of the Motion Compensation Kernel of the AVS Video Decoder on FPGA, GPU and Multicore Processors

    Implementation and Performance Comparison of the Motion Compensation Kernel of the AVS Video Decoder on FPGA, GPU and Multicore Processors by Owaida, M, Bellas, N, Antonopoulos, C D, Daloukas, K, Antoniadis, C, Krommydas, K, Tsoumblekas, G

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  2. 2
    Synthesis of Platform Architectures from OpenCL Programs

    Synthesis of Platform Architectures from OpenCL Programs by Owaida, M, Bellas, N, Daloukas, K, Antonopoulos, C D

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  3. 3
    Massively parallel programming models used as hardware description languages: The OpenCL case

    Massively parallel programming models used as hardware description languages: The OpenCL case by Owaida, M., Bellas, N., Antonopoulos, C. D., Daloukas, K., Antoniadis, C.

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  4. 4
    A high performance and low power hardware architecture for the transform & quantization stages in H.264

    A high performance and low power hardware architecture for the transform & quantization stages in H.264 by Owaida, M., Koziri, M., Katsavounidis, I., Stamoulis, G.

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  5. 5
    Shortening Design Time through Multiplatform Simulations with a Portable OpenCL Golden-model: The LDPC Decoder Case

    Shortening Design Time through Multiplatform Simulations with a Portable OpenCL Golden-model: The LDPC Decoder Case by Falcao, G., Owaida, M., Novo, D., Purnaprajna, M., Bellas, N., Antonopoulos, C. D., Karakonstantis, G., Burg, A., Ienne, P.

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  6. 6
    Scalable inference of decision tree ensembles: Flexible design for CPU-FPGA platforms

    Scalable inference of decision tree ensembles: Flexible design for CPU-FPGA platforms by Owaida, Muhsen, Hantian Zhang, Ce Zhang, Alonso, Gustavo

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  7. 7
    doppioDB: A hardware accelerated database

    doppioDB: A hardware accelerated database by Sidler, David, Owaida, Muhsen, Istvan, Zsolt, Kara, Kaan, Alonso, Gustavo

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  8. 8
    Off-chip bus power minimization using serialization with cache-based encoding

    Off-chip bus power minimization using serialization with cache-based encoding by Mohammad, Khader, Kabeer, Ahsan, Taha, Tarek M., Owaida, Muhsen, Washha, Mahdi

    Published in Microelectronics
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