Search Results - Paliaroutis, Georgios Ioannis

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  1. 1
    Analysis of the Impact of Electrical and Timing Masking on Soft Error Rate Estimation in VLSI Circuits

    Analysis of the Impact of Electrical and Timing Masking on Soft Error Rate Estimation in VLSI Circuits by Tsoumanis, Pelopidas, Paliaroutis, Georgios Ioannis, Evmorfopoulos, Nestor, Stamoulis, George

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  2. 2
    SET Pulse Characterization and SER Estimation in Combinational Logic with Placement and Multiple Transient Faults Considerations

    SET Pulse Characterization and SER Estimation in Combinational Logic with Placement and Multiple Transient Faults Considerations by Paliaroutis, Georgios Ioannis, Tsoumanis, Pelopidas, Evmorfopoulos, Nestor, Dimitriou, George, Stamoulis, Georgios I.

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    Sensitivity-aware Hardware Trojan Injection for SET Propagation and Soft Error Attacks

    Sensitivity-aware Hardware Trojan Injection for SET Propagation and Soft Error Attacks by Takou, Alexandra, Paliaroutis, Georgios-Ioannis, Tsoumanis, Pelopidas, Evmorfopoulos, Nestor, Stamoulis, George

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  4. 4
    A Gate-Level SER Estimation Tool With Event-Driven Dynamic Timing and SET Height Consideration

    A Gate-Level SER Estimation Tool With Event-Driven Dynamic Timing and SET Height Consideration by Paliaroutis, Georgios-Ioannis, Tsoumanis, Pelopidas, Garyfallou, Dimitrios, Vagenas, Anastasis, Evmorfopoulos, Nestor, Stamoulis, George

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