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FastSim: A Fast Simulation Framework for High-Level Synthesis
by
Abderehman, Mohammed
,
Patidar, Jayprakash
,
Oza, Jay
,
Nigam, Yom
,
Khader, TM Abdul
,
Karfa, Chandan
Published in
IEEE transactions on computer-aided design of integrated circuits and systems
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Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems
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C++ Languages
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Computer Science
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Computer Science, Hardware & Architecture
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Computer Science, Interdisciplinary Applications
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Cycle-Accurate Simulation
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Estimation
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Feature Extraction
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Field Programmable Gate Arrays
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High Level Synthesis
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High-Level Synthesis
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Integrated Circuit Modeling
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Performance Estimation
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Register Transfer Level Debugging
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Rtl Verification
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