28-nm FDSOI nMOSFET RF Figures of Merits and Parasitic Elements Extraction at Cryogenic Temperature Down to 77 K by Esfeh, Babak Kazemi, Kilchytska, Valeriya, Planes, N., Haond, M., Flandre, Denis, Raskin, Jean-Pierre

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28nm FDSOI technology platform for high-speed low-voltage digital applications by Planes, N., Weber, O., Barral, V., Haendler, S., Noblet, D., Croain, D., Bocat, M., Sassoulas, P., Federspiel, X., Cros, A., Bajolet, A., Richard, E., Dumont, B., Perreau, P., Petit, D., Golanski, D., Fenouillet-Beranger, C., Guillot, N., Rafik, M., Huard, V., Puget, S., Montagner, X., Jaud, M., Rozeau, O., Saxod, O., Wacquant, F., Monsieur, F., Barge, D., Pinzelli, L., Mellier, M., Boeuf, F., Arnaud, F., Haond, M.

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Characterization and modeling of drain current local variability in 28 and 14 nm FDSOI nMOSFETs by Ioannidis, E.G., Haendler, S., Josse, E., Planes, N., Ghibaudo, G.

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Robustness Assessment Through 77GHz Operating Life Test of Power Amplifier for Radar Applications in 28nm FD-SOI CMOS by Cacho, F., Cathelin, P., Hai, J., Bouvot, S., Nowakowski, J., Martinez, M., Debroucke, R., Jean, S., Paulin, R., Antonijevic, J., Federspiel, X., Planes, N., Papotto, G., Parisi, A., Finocchiaro, A., Cavarra, A., Castorina, A., Nocera, C., Palmisano, G.

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Impact of local back biasing on performance in hybrid FDSOI/bulk high-k/metal gate low power (LP) technology by Fenouillet-Beranger, C., Perreau, P., Benoist, T., Richier, C., Haendler, S., Pradelle, J., Bustos, J., Brun, P., Tosti, L., Weber, O., Andrieu, F., Orlando, B., Pellissier-Tanon, D., Abbate, F., Richard, C., Beneyton, R., Gregoire, M., Ducote, J., Gouraud, P., Margain, A., Borowiak, C., Bianchini, R., Planes, N., Gourvest, E., Bourdelle, K.K., Nguyen, B.Y., Poiroux, T., Skotnicki, T., Faynot, O., Boeuf, F.

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Hot carrier degradation mechanisms of short-channel FDSOI n-MOSFETs by Karatsori, T. A., Theodorou, C. G., Haendler, S., Planes, N., Ghibaudo, G., Dimitriadis, C. A.

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28 nm FDSOI analog and RF Figures of Merit at N2 cryogenic temperatures by Kazemi Esfeh, B., Planes, N., Haond, M., Raskin, J.-P., Flandre, D., Kilchytska, V.

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Assessment of 28 nm UTBB FD-SOI technology platform for RF applications: Figures of merit and effect of parasitic elements by Kazemi Esfeh, B., Kilchytska, V., Barral, V., Planes, N., Haond, M., Flandre, D., Raskin, J.-P.

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Comparison of self-heating and its effect on analogue performance in 28 nm bulk and FDSOI by Makovejev, S., Planes, N., Haond, M., Flandre, D., Raskin, J.-P., Kilchytska, V.

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Characterization and modeling of drain current local variability in 28 and 14nm FDSOI nMOSFETs by Ioannidis, E.G., Haendler, S., Josse, E., Planes, N., Ghibaudo, G.

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An in-depth analysis of temperature effect on DIBL in UTBB FD SOI MOSFETs based on experimental data, numerical simulations and analytical models by Pereira, A.S.N., de Streel, G., Planes, N., Haond, M., Giacomini, R., Flandre, D., Kilchytska, V.

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Comparison of self-heating and its effect on analogue performance in 28nm bulk and FDSOI by Makovejev, S., Planes, N., Haond, M., Flandre, D., Raskin, J.-P., Kilchytska, V.

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Hot-carrier degradation model for nanoscale ultra-thin body ultra-thin box SOI MOSFETs suitable for circuit simulators by Karatsori, T.A., Theodorou, C.G., Haendler, S., Planes, N., Ghibaudo, G., Dimitriadis, C.A.

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Assessment of 28nm UTBB FD-SOI technology platform for RF applications: Figures of merit and effect of parasitic elements by Kazemi Esfeh, B., Kilchytska, V., Barral, V., Planes, N., Haond, M., Flandre, D., Raskin, J.-P.

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NBTI degradation: From transistor to SRAM arrays by Huard, V., Parthasarathy, C., Guerin, C., Valentin, T., Pion, E., Mammasse, M., Planes, N., Camus, L.

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Wide frequency band assessment of 28nm FDSOI technology platform for analogue and RF applications by Makovejev, S., Kazemi Esfeh, B., Barral, V., Planes, N., Haond, M., Flandre, D., Raskin, J.-P., Kilchytska, V.

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Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology by Flatresse, P., Giraud, B., Noel, J., Pelloux-Prayer, B., Giner, F., Arora, D., Arnaud, F., Planes, N., Le Coz, J., Thomas, O., Engels, S., Cesana, G., Wilson, R., Urard, P.

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65 nm LP/GP mix low cost platform for multi-media wireless and consumer applications by Tavel, B., Duriez, B., Gwoziecki, R., Basso, M.T., Julien, C., Ortolland, C., Laplanche, Y., Fox, R., Sabouret, E., Detcheverry, C., Boeuf, F., Morin, P., Barge, D., Bidaud, M., Biénacel, J., Garnier, P., Cooper, K., Chapon, J.D., Trouiller, Y., Belledent, J., Broekaart, M., Gouraud, P., Denais, M., Huard, V., Rochereau, K., Difrenza, R., Planes, N., Marin, M., Boret, S., Gloria, D., Vanbergue, S., Abramowitz, P., Vishnubhotla, L., Reber, D., Stolk, P., Woo, M., Arnaud, F.

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Investigation of porous silicon as a new compliant substrate for 3C-SiC deposition by Namavar, F, Colter, P.C, Planes, N, Fraisse, B, Pernot, J, Juillaguet, S, Camassel, J

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Back-gate bias effect on UTBB-FDSOI non-linearity performance by Esfeh, B. Kazemi, Kilchytska, V., Parvais, B., Planes, N., Haond, M., Flandre, D., Raskin, J.-P

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