Search Results - Pronath, M.

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  1. 1
    Robust Analog Design for Automotive Applications by Design Centering With Safe Operating Areas

    Robust Analog Design for Automotive Applications by Design Centering With Safe Operating Areas by Sobe, U., Rooch, K.-H., Ripp, A., Pronath, M.

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  2. 2
    Mismatch analysis and direct yield optimization by spec-wise linearization and feasibility-guided search

    Mismatch analysis and direct yield optimization by spec-wise linearization and feasibility-guided search by Schenkel, F., Pronath, M., Zizala, S., Schwencker, R., Graeb, H., Antreich, K.

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  3. 3
    Analog circuit sizing using adaptive worst-case parameter sets

    Analog circuit sizing using adaptive worst-case parameter sets by Schwencker, R., Schenkel, F., Pronath, M., Graeb, H.

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  4. 4
    A test design method for floating gate defects (FGD) in analog integrated circuits

    A test design method for floating gate defects (FGD) in analog integrated circuits by Pronath, M., Graeb, H., Antreich, K.

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  5. 5
    Robust Analog Design for Automotive Applications by Design Centering with Safe Operating Areas

    Robust Analog Design for Automotive Applications by Design Centering with Safe Operating Areas by Sobe, U., Rooch, K.-H., Ripp, A., Pronath, M.

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  6. 6
    Digital design at a crossroads How to make statistical design methodologies industrially relevant

    Digital design at a crossroads How to make statistical design methodologies industrially relevant by Schlichtmann, U., Schmidt, M., Kinzelbach, H., Pronath, M., Glockel, V., Dietrich, M., Eichler, U., Haase, J.

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  7. 7
    DATE 2006 Special Session: DFM/DFY Design for Manufacturability and Yield - influence of process variations in digital, analog and mixed-signal circuit design

    DATE 2006 Special Session: DFM/DFY Design for Manufacturability and Yield - influence of process variations in digital, analog and mixed-signal circuit design by Ripp, A., Buhler, M., Koehl, J., Bickford, J., Hibbeler, J., Schlichtmann, U., Sommer, R., Pronath, M.

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  8. 8
    A parametric test method for analog components in integrated mixed-signal circuits

    A parametric test method for analog components in integrated mixed-signal circuits by Pronath, M., Gloeckel, V., Graeb, H.

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  9. 9
    Experimental Verification of Simulation Based Yield Optimization for Power-On Reset Cells

    Experimental Verification of Simulation Based Yield Optimization for Power-On Reset Cells by Rappitsch, G., Eisenberger, O., Obermeier, B., Ripp, A., Pronath, M.

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  10. 10
    WiCkeD: analog circuit synthesis incorporating mismatch

    WiCkeD: analog circuit synthesis incorporating mismatch by Antreich, K., Eckmueller, J., Graeb, H., Pronath, M., Schenkel, F., Schwencker, R., Zizala, S.

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  11. 11
    A fast method for identifying matching-relevant transistor pairs

    A fast method for identifying matching-relevant transistor pairs by Eschenkel, F., Pronath, M., Graeb, H., Antreich, K.

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  12. 12
    DFY/DFM - design for yield and manufacturability (industrial tutorial)

    DFY/DFM - design for yield and manufacturability (industrial tutorial) by Ripp, A., Sommer, R., Hennig, E., Pronath, M.

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  13. 13
    A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits

    A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits by Pronath, M., Graeb, H., Antreich, K.

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  14. 14
    Analog Circuit Sizing Using Adaptive Worst-Case Parameter Sets

    Analog Circuit Sizing Using Adaptive Worst-Case Parameter Sets by Schwencker, R., Schenkel, F., Pronath, M., Graeb, H.

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