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Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor
by
Rossi, D.
,
Mucci, C.
,
Campi, F.
,
Spolzino, S.
,
Vanzolini, L.
,
Sahlbach, H.
,
Whitty, S.
,
Ernst, R.
,
Putzke-Roming, W.
,
Guerrieri, R.
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IEEE transactions on very large scale integration (VLSI) systems
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Mapping of a film grain removal algorithm to a heterogeneous reconfigurable architecture
by
Whitty, S.
,
Sahlbach, H.
,
Ernst, R.
,
Putzke-Roming, W.
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Data type analysis for hardware synthesis from object-oriented models
by
Radetzki, M.
,
Stammermann, A.
,
Putzke-Roming, W.
,
Nebel, W.
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A flexible message passing mechanism for Objective VHDL
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Putzke-Roming, W.
,
Radetzki, M.
,
Nebel, W.
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A flexible message passing mechanism for objective VHDL
by
Putzke-Röming, W.
,
Radetzki, M.
,
Nebel, W.
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Modeling communication with Objective VHDL
by
Putzke-Roming, W.
,
Radetzki, M.
,
Nebel, W.
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