Search Results - Qureshi, Moinuddin K.

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  1. 1
    Defending Against Model Stealing Attacks With Adaptive Misinformation

    Defending Against Model Stealing Attacks With Adaptive Misinformation by Kariyappa, Sanjay, Qureshi, Moinuddin K.

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  2. 2
    Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches

    Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches by Qureshi, Moinuddin K., Patt, Yale N.

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  3. 3
    Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM

    Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM by Chang, Kevin K., Nair, Prashant J., Donghyuk Lee, Ghose, Saugata, Qureshi, Moinuddin K., Mutlu, Onur

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  4. 4
    AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems

    AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems by Qureshi, Moinuddin K., Dae-Hyun Kim, Khan, Samira, Nair, Prashant J., Mutlu, Onur

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  5. 5
    SafeGuard: Reducing the Security Risk from Row-Hammer via Low-Cost Integrity Protection

    SafeGuard: Reducing the Security Risk from Row-Hammer via Low-Cost Integrity Protection by Fakhrzadehgan, Ali, Patt, Yale N., Nair, Prashant J., Qureshi, Moinuddin K.

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  6. 6
    SecDDR: Enabling Low-Cost Secure Memories by Protecting the DDR Interface

    SecDDR: Enabling Low-Cost Secure Memories by Protecting the DDR Interface by Fakhrzadehgan, Ali, Ramrakhyani, Prakash, Qureshi, Moinuddin K., Erez, Mattan

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  7. 7
    Improving read performance of Phase Change Memories via Write Cancellation and Write Pausing

    Improving read performance of Phase Change Memories via Write Cancellation and Write Pausing by Qureshi, Moinuddin K, Franceschini, Michele M, Lastras-Montano, Luis A

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  8. 8
    BEAR: Techniques for mitigating bandwidth bloat in gigascale DRAM caches

    BEAR: Techniques for mitigating bandwidth bloat in gigascale DRAM caches by Chiachen Chou, Jaleel, Aamer, Qureshi, Moinuddin K.

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  9. 9
    To Update or Not To Update?: Bandwidth-Efficient Intelligent Replacement Policies for DRAM Caches

    To Update or Not To Update?: Bandwidth-Efficient Intelligent Replacement Policies for DRAM Caches by Young, Vinson, Qureshi, Moinuddin K.

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  10. 10
    Unified address translation for memory-mapped SSDs with FlashMap

    Unified address translation for memory-mapped SSDs with FlashMap by Jian Huang, Badam, Anirudh, Qureshi, Moinuddin K., Schwan, Karsten

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  11. 11
    New Attacks and Defense for Encrypted-Address Cache

    New Attacks and Defense for Encrypted-Address Cache by Qureshi, Moinuddin K.

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  12. 12
    TicToc: Enabling Bandwidth-Efficient DRAM Caching for Both Hits and Misses in Hybrid Memory Systems

    TicToc: Enabling Bandwidth-Efficient DRAM Caching for Both Hits and Misses in Hybrid Memory Systems by Young, Vinson, Chishti, Zeshan A., Qureshi, Moinuddin K.

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  13. 13
    Reducing read latency of phase change memory via early read and Turbo Read

    Reducing read latency of phase change memory via early read and Turbo Read by Nair, Prashant J., Chiachen Chou, Rajendran, Bipin, Qureshi, Moinuddin K.

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  14. 14
    Reducing Refresh Power in Mobile Devices with Morphable ECC

    Reducing Refresh Power in Mobile Devices with Morphable ECC by Chiachen Chou, Nair, Prashant, Qureshi, Moinuddin K.

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  15. 15
    Citadel: Efficiently Protecting Stacked Memory from TSV and Large Granularity Failures

    Citadel: Efficiently Protecting Stacked Memory from TSV and Large Granularity Failures by Nair, Prashant J., Roberts, David A., Qureshi, Moinuddin K.

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  16. 16
    A Case for MLP-Aware Cache Replacement

    A Case for MLP-Aware Cache Replacement by Qureshi, Moinuddin K., Lynch, Daniel N., Mutlu, Onur, Patt, Yale N.

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  17. 17
    NVRAM-aware logging in transaction systems

    NVRAM-aware logging in transaction systems by Huang, Jian, Schwan, Karsten, Qureshi, Moinuddin K.

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  18. 18
    Embedded tutorial - Emerging memory technologies: What it means for computer system designers

    Embedded tutorial - Emerging memory technologies: What it means for computer system designers by Qureshi, Moinuddin K.

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  19. 19
    F ault S im: A Fast, Configurable Memory-Reliability Simulator for Conventional and 3D-Stacked Systems

    F ault S im: A Fast, Configurable Memory-Reliability Simulator for Conventional and 3D-Stacked Systems by Nair, Prashant J., Roberts, David A., Qureshi, Moinuddin K.

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  20. 20
    The V-Way Cache: Demand Based Associativity via Global Replacement

    The V-Way Cache: Demand Based Associativity via Global Replacement by Qureshi, Moinuddin K., Thompson, David, Patt, Yale N.

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