SRAM bitline circuits on PD SOI: advantages and concerns by Kuang, J.B., Ratanaphanyarat, S., Saccamango, M.J., Hsu, L.L.-C., Flaker, R.C., Wagner, L.F., Chu, S.-F. S., Shahidi, G.G.

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A floating-body charge monitoring technique for partially depleted SOI technology by Kuang, J. B., Saccamango, M. J., Ratanaphanyarat, S., Chuang, C.-T.

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A self-aligned nitrogen implantation process (SNIP) to minimize field oxide thinning effect in submicrometer LOCOS by Ratanaphanyarat, S., Kuang, J.B., Wong, S.S.

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Oxygen implantation to suppress parasitic bipolar action in CMOS by Ratanaphanyarat, S., Renteln, P., Drowley, C.I., Wong, S.S.

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An SOI floating body charge monitor technique by Saccamango, M.J., Kuang, J.B., Hsu, L.L., Ratanaphanyarat, S.

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Self-aligned vertical p- n- p transistor: Device characterization from room to cryogenic temperatures by Kuang, J.B., Ratanaphanyarat, S., Chu, S.F., Seshan, K.

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Low frequency and microwave characterization of submicron-gate In0.52Al0.48As/In0.53Ga0.47As/In0.52Al0.48As heterojunction metal-semiconductor field-effect transistors grown by mol... by Kuang, J. B., Tasker, P. J., Ratanaphanyarat, S., Schaff, W. J., Eastman, L. F., Wang, G. W., Chen, Y. K., Aina, O. A., Hier, H., Fathimulla, A.

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Effect of emitter contact materials on high-performance vertical p-n-p transistors by Ratanaphanyarat, S., Rausch, W., Smadi, M., Saccamango, M.J., Mei, S.N., Chu, S.-F., Ronsheim, P.A., Chu, J.O.

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A floating-body charge monitor circuit for partially depleted SOI CMOS by Kuang, J.B., Saccamango, M.J., Ratanaphanyarat, S.

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Low frequency and microwave characterization of submicron-gate In(0.52)Al(0.48)As/In(0.53)Ga(0.47)As/In(0.52)Al( .48)As heterojunction metal-semiconductor field-effect transistors... by Kuang, J B, Tasker, P J, RATANAPHANYARAT, S, Schaff, W J, Eastman, L F

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Low frequency and microwave characterization of submicron-gate In0.52Al0.48As/In0.53Ga0.47As/In0.52Al0.48As heterojunction metal-semiconductor field-effect transistors growth by mo... by KUANG, J. B, TASKER, P. J, RATANAPHANYARAT, S, SCHAFF, W. J, EASTMAN, L. F, WANG, G. W, CHEN, Y. K, AINA, O. A, HIER, H, FATHIMULLA, A

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Modeling the small-emitter effect in polysilicon-emitter transistors by Wagner, L.F., Kim, K.M., Nguyen, P.T., Saccamango, M.J., Cunningham, B., DeVries, K., Ratanaphanyarat, S., Fischer, S.E., Snare, J.L., Lucchese, A., Strugazow, P., Peressini, P., Chu, S.F., Knepper, R.W.

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A high performance epitaxial SiGe-base ECL BiCMOS technology by Harame, Crabbe, Cressler, Comfort, Sun, Stiffler, Kobeda, Burghartz, Gilbert, Malinowski, Dally, Ratanaphanyarat, Saccamango, Rausch, Cotte, Chu, Stork

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A comparative device and performance analysis between a Si-Ge epitaxial-base HBT and a Si double-poly I/I BJT npn structure by Pelella, M.M., Nguyen, P.T., Saccamango, M.J., Ratanaphanyarat, S., Comfort, J.H., Fischer, S.E., Knepper, R.W., Peressini, P.P., Chu, S.F.

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A 0.25 /spl mu/m CMOS SOI technology and its application to 4 Mb SRAM by Schepis, D.J., Assaderaghi, F., Yee, D.S., Rausch, W., Bolam, R.J., Ajmera, A.C., Leobandung, E., Kulkarni, S.B., Flaker, R., Sadana, D., Hovel, H.J., Kebede, T., Schiller, C., Wu, S., Wagner, L.F., Saccamango, M.J., Ratanaphanyarat, S., Kuang, J.B., Hsieh, M.C., Tallman, K.A., Martino, R.M., Fitzpatrick, D., Badami, D.A., Hakey, M., Chu, S.F., Davari, B., Shahidi, G.G.

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Low thermal budget antimony/phosphorus NMOS technology for CMOS by Harame, D.L., Ganin, E., Comfort, J.H., Sun, J.Y.-C., Acovic, A., Cohen, S.A., Ronsheim, P.A., Verdonckt-Vandebroek, S., Restle, P.J., Ratanaphanyarat, S., Saccamango, M.J., Johnson, J.B., Furkay, S.A.

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