Search Results - Rocha, Leandro Mateus Giacomini

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  1. 1
    Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers

    Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers by Paim, Guilherme, Rocha, Leandro Mateus Giacomini, Santana, Gustavo Madeira, Soares, Leonardo Bandeira, da Costa, Eduardo Antonio Cesar, Bampi, Sergio

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  2. 2
    Fixed-Point NLMS and IPNLMS VLSI Architectures for Accurate FECG and FHR Processing

    Fixed-Point NLMS and IPNLMS VLSI Architectures for Accurate FECG and FHR Processing by da Costa, Patricia Ucker, Paim, Guilherme, Rocha, Leandro Mateus Giacomini, da Costa, Eduardo Antonio Cesar, de Almeida, Sergio Jose Melo, Bampi, Sergio

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  3. 3
    A Cross-Layer Gate-Level-to-Application Co-Simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders

    A Cross-Layer Gate-Level-to-Application Co-Simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders by Paim, Guilherme, Rocha, Leandro Mateus Giacomini, Amrouch, Hussam, da Costa, Eduardo Antonio Cesar, Bampi, Sergio, Henkel, Jorg

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  4. 4
    Exploring approximations in 4- and 8- point DTT hardware architectures for low-power image compression

    Exploring approximations in 4- and 8- point DTT hardware architectures for low-power image compression by Paim, Guilherme, Santana, Gustavo Madeira, Rocha, Leandro Mateus Giacomini, Soares, Leonardo Bandeira, da Costa, Eduardo Antônio César, Bampi, Sergio

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