Search Results - Rombouts, Marijn

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  1. 1
    A Sub‐Picojoule per Bit Integrated Magneto‐Optic Modulator on Silicon: Modeling and Experimental Demonstration

    A Sub‐Picojoule per Bit Integrated Magneto‐Optic Modulator on Silicon: Modeling and Experimental Demonstration by Rombouts, Marijn P. G., Karinou, Fotini, Pintus, Paolo, Huang, Duanni, Bowers, John E., Calabretta, Nicola

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  2. 2
    Architecture for low-cost and highly flexible metro-access networks using SOA-based OADM nodes and digital subcarrier multiplexing with power loading

    Architecture for low-cost and highly flexible metro-access networks using SOA-based OADM nodes and digital subcarrier multiplexing with power loading by Hu, Zhouyi, Xia, Shiyi, Santana, Henrique Freire, Rombouts, Marijn, Shi, Bin, Calabretta, Nicola

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  3. 3
    Photonic WDM switches architecture for multi-band optical networks

    Photonic WDM switches architecture for multi-band optical networks by Xia, Shiyi, Hu, Zhouyi, Rombouts, Marijn, Freire Santana, Henrique, Wang, Yu, Rasoulzadeh Zali, Aref, Raz, Oded, Calabretta, Nicola

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  4. 4
    Photonic networks with nanoseconds switching and control for distributed machine learning systems

    Photonic networks with nanoseconds switching and control for distributed machine learning systems by Calabretta, Nicola, Xue, Xuwei, Santana, Henrique Freire, Zali, Aref Rasoulzadeh, Guo, Xiaotao, Rombouts, Marijn, Pan, Bitao, Yan, Fulong

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  5. 5
    The Truth About 2-Level Transition Elimination in Bang-Bang PAM-4 CDRs

    The Truth About 2-Level Transition Elimination in Bang-Bang PAM-4 CDRs by Verbeke, Marijn, Torfs, Guy, Rombouts, Pieter

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  6. 6
    A 25 Gb/s All-Digital Clock and Data Recovery Circuit for Burst-Mode Applications in PONs

    A 25 Gb/s All-Digital Clock and Data Recovery Circuit for Burst-Mode Applications in PONs by Verbeke, Marijn, Rombouts, Pieter, Ramon, Hannes, Verbist, Jochem, Bauwelinck, Johan, Yin, Xin, Torfs, Guy

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  7. 7
    A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit

    A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit by Verbeke, Marijn, Rombouts, Pieter, Ramon, Hannes, Moeneclaey, Bart, Xin Yin, Bauwelinck, Johan, Torfs, Guy

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  8. 8
    Influence of Jitter on Limit Cycles in Bang-Bang Clock and Data Recovery Circuits

    Influence of Jitter on Limit Cycles in Bang-Bang Clock and Data Recovery Circuits by Verbeke, Marijn, Rombouts, Pieter, Vyncke, Arno, Torfs, Guy

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