Optimal design of junctionless double gate vertical MOSFET using hybrid Taguchi-GRA with ANN prediction by Kaharudin, K. E., Salehuddin, F., M. Zain, A. S., Roslan, Ameer F.

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Impact of strained channel on electrical properties of Junctionless Double Gate MOSFET by Kaharudin, K E, Salehuddin, F., Zain, A S M, Roslan, Ameer F, Ahmad, I

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Minimum leakage current optimization on 22 nm SOI NMOS device with HfO2/WSix/Graphene gate structure using Taguchi method by Afifah Maheran, A H, Firhat, E N, Salehuddin, F, Mohd Zain, A S, Ahmad, I, Noor Faizah, Z A, Menon, P S, Elgomati, H A, Roslan, Ameer F

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Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design by Roslan, Ameer F, Salehuddin, F, Zain, A S M, Kaharudin, K E, Ahmad, I, Hazura, H, Hanim, A R, Idris, S K, Hamid, Afifah Maheran A

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Optimization of 10nm Bi-GFET Device for higher ION/IOFF ratio using Taguchi Method by Roslan, Ameer F, Kaharudin, K E, Salehuddin, F, Zain, A S M, Ahmad, I, Faizah, Z A N, Hazura, H, Hanim, A R, Idris, S K, Zaiton, A M, Mohamad, N R, Hamid, Afifah Maheran A

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Comparative Analysis of Process Parameter Variations in DGFinFET Device Using Statistical Methods by Roslan, Ameer F, Salehuddin, F, M Zain, A S, Mansor, Norhisham, Kaharudin, K E, Ahmad, I, Hazura, H, Hanim, A R, Idris, S K, Zaiton, A M, Zarina, B Z, Mohamad, N R, A Hamid, Afifah Maheran

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