A 10nm high performance and low-power CMOS technology featuring 3rd generation FinFET transistors, Self-Aligned Quad Patterning, contact over active gate and cobalt local interconn... by Auth, C., Aliyarukunju, A., Asoro, M., Bergstrom, D., Bhagwat, V., Birdsall, J., Bisnik, N., Buehler, M., Chikarmane, V., Ding, G., Fu, Q., Gomez, H., Han, W., Hanken, D., Haran, M., Hattendorf, M., Heussner, R., Hiramatsu, H., Ho, B., Jaloviar, S., Jin, I., Joshi, S., Kirby, S., Kosaraju, S., Kothari, H., Leatherman, G., Lee, K., Leib, J., Madhavan, A., Marla, K., Meyer, H., Mule, T., Parker, C., Parthasarathy, S., Pelto, C., Pipes, L., Post, I., Prince, M., Rahman, A., Rajamani, S., Saha, A., Santos, J. Dacuna, Sharma, M., Sharma, V., Shin, J., Sinha, P., Smith, P., Sprinkle, M., St. Amour, A., Staus, C., Suri, R., Towner, D., Tripathi, A., Tura, A., Ward, C., Yeoh, A.

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