IBM z14: Enabling physical design in 14-nm technology for high performance, high-reliability microprocessors by Wolpert, D., Behnen, E., Sigal, L., Chan, Y., Tellez, G. E., Bradley, D., Serton, R., Veerabhadraiah, R., Ansley, W., Bianchi, A., Dhanwada, N., Lee, S., Scheuermann, M., Wiedemeier, G., Davis, J., Werner, T., Darden, L., Barkley, K., Gray, M., Guzowski, M., DeHond, M., Schell, T., Tsapepas, S., Phan, D., Acharya, K., Zitz, J. A., Shi, H. F., Berry, C., Warnock, J., Wood, M. H., Averill, R. M.

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Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor by Pelella, A R, Chan, Y H, Balakrishnan, B, Patel, P, Rodko, D, Serton, R E

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