Accurate and compact convolutional neural network based on stochastic computing by Abdellatef, Hamdan, Khalil-Hani, Mohamed, Shaikh-Husin, Nasir, Ayat, Sayed Omid

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CNTFET based Voltage Mode MISO Active only Biquadratic Filter for Multi-GHz Frequency Applications by Masud, Muhammad I., A’ain, Abu Khari Bin, Khan, Iqbal A., Shaikh-Husin, Nasir

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High Throughput PRESENT Cipher Hardware Architecture for the Medical IoT Applications by Damodharan, Jamunarani, Susai Michael, Emalda Roslin, Shaikh-Husin, Nasir

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Stochastic Computing Correlation Utilization in Convolutional Neural Network Basic Functions by Abdellatef, Hamdan, Hani, Mohamed Khalil, Husin, Nasir Shaikh, Ayat, Sayed Omid

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FPGA-Based Real-Time Moving Target Detection System for Unmanned Aerial Vehicle Application by Marsono, Muhammad Nadzir, Sheikh, Usman Ullah, Shaikh-Husin, N., Tang, Jia Wei

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Low-area and accurate inner product and digital filters based on stochastic computing by Abdellatef, Hamdan, Khalil-Hani, Mohamed, Shaikh-Husin, Nasir, Omid Ayat, Sayed

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DPLBAnt: Improved load balancing technique based on detection and rerouting of elephant flows in software-defined networks by Hamdan, Mosab, Khan, Suleman, Abdelaziz, Ahmed, Sadiah, Shahidatul, Shaikh-Husin, Nasir, Al Otaibi, Sattam, Maple, Carsten, Marsono, M.N.

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A linked list run-length-based single-pass connected component analysis for real-time embedded hardware by Tang, Jia Wei, Shaikh-Husin, Nasir, Sheikh, Usman Ullah, Marsono, M. N.

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CNTFET Based Grounded Active Inductor for Broadband Applications by I. Masud, Muhammad, Shaikh-Husin, Nasir, A. Khan, Iqbal, K. Bin A’Ain, Abu

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An Empirical Evaluation of Topologies for Large Scale NoC by Baboli, Mehdi, Shaikh Husin, Nasir

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An optimized buffer insertion algorithm with delay-power constraints for VLSI layouts by UTTRAPHAN, Chessda, SHAIKH-HUSIN, Nasir, KHALIL-HANI, Mohamed

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A CNTFET-C first order all pass filter by Masud, Muhammad I., A’ain, A. K. Bin, Khan, Iqbal A., Shaikh-Husin, Nasir

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Stochastic Computing Correlation Utilization in Convolutional Neural Network Basic Functions by Abdellatef, Hamdan, Khalil-hani, Mohamed, Shaikh-husin, Nasir, Ayat, Sayed Omid

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Application Profiling and Mapping on NoC-based MPSoC Emulation Platform on Reconfigurable Logic by Tang, Jia Wei, Wen Hau, Yuan, Shaikh-Husin, Nasir, Marsono, Muhammad Nadzir

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An Optimization Algorithm Based On Grid-Graphs For Minimizing Interconnect Delay In VLSI Layout Design by Khalil-Hani, Mohamed, Shaikh-Husin, Nasir

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Feasible transition path generation for EFSM-based system testing by Sieng Wong, Chia Yee Ooi, Yuan Wen Hau, Marsono, M. N., Shaikh-Husin, Nasir

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Deadlock detection and avoidance using Signal Interpreted Petri Nets by Aspar, Z., Khalil-Hani, M., Shaikh-Husin, N.

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Simultaneous Routing and Buffer Insertion algorithm for interconnect delay optimization in VLSI layout design by Hani, M.K., Shaikh-Husin, N.

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A Particle Swarm Optimization Approach for Routing in VLSI by Ayob, M Nasir, Yusof, Zulkifli Md, Adam, Asrul, Abidin, Amar Faiz Zainal, Ibrahim, Ismail, Ibrahim, Zuwairie, Sudin, Shahdan, Shaikh-Husin, N, Hani, M Khalil

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Mixed signal neural circuits for shortest path computation by Shaikh-Husin, N., Meador, J.L.

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