Search Results - Sikdar, B K

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  1. 1
    Hazard identification, risk assessment, and control measures as an effective tool of occupational health assessment of hazardous process in an iron ore pelletizing industry

    Hazard identification, risk assessment, and control measures as an effective tool of occupational health assessment of hazardous process in an iron ore pelletizing industry by Rout, B, Sikdar, B

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  2. 2
    Fault diagnosis of VLSI circuits with cellular automata based pattern classifier

    Fault diagnosis of VLSI circuits with cellular automata based pattern classifier by Sikdar, B.K., Ganguly, N., Chaudhuri, P.P.

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  3. 3
    Design and characterization of cellular automata based associative memory for pattern recognition

    Design and characterization of cellular automata based associative memory for pattern recognition by Niloy Ganguly, Maji, P., Sikdar, B.K., Chaudhuri, P.P.

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  4. 4
    Design of hierarchical cellular automata for on-chip test pattern generator

    Design of hierarchical cellular automata for on-chip test pattern generator by Sikdar, B.K., Ganguly, N., Chaudhuri, P.P.

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  5. 5
    Generation of test patterns without prohibited pattern set

    Generation of test patterns without prohibited pattern set by Sikdar, B.K., Ganguly, N., Chaudhuri, P.P.

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  6. 6
    Power conscious BIST design for sequential circuits using ghost-FSM

    Power conscious BIST design for sequential circuits using ghost-FSM by Roy, Sikdar

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  7. 7
    A cellular automata based scheme for diagnosis of faulty nodes in WSN

    A cellular automata based scheme for diagnosis of faulty nodes in WSN by Maity, Ilora, Bhattacharya, G., Das, S., Sikdar, B. K.

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  8. 8
    Exploring Impact of Faults on Branch Predictors' Power for Diagnosis of Faulty Module

    Exploring Impact of Faults on Branch Predictors' Power for Diagnosis of Faulty Module by Bhattacharya, G., Maity, I., Sikdar, B. K., Das, B.

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  9. 9
    Design of universal logic gate targeting minimum wire-crossings in QCA logic circuit

    Design of universal logic gate targeting minimum wire-crossings in QCA logic circuit by Sen, B, Sengupta, A, Dalui, M, Sikdar, B K

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  10. 10
    CA based quick consensus in distributed system through network partitioning

    CA based quick consensus in distributed system through network partitioning by Dalui, M, Bakshi, S, Sikdar, B K

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  11. 11
    An evolutionary strategy to design an on-chip test pattern generator without prohibited pattern set (PPS)

    An evolutionary strategy to design an on-chip test pattern generator without prohibited pattern set (PPS) by Ganguly, N., Nandi, A., Das, S., Sikdar, B.K., Chaudhuri, P.P.

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  12. 12
    SSMCA: CA based Segmented Sensor Network Management scheme

    SSMCA: CA based Segmented Sensor Network Management scheme by Banerjee, I, Das, S, Rahaman, H, Sikdar, B K, Dalui, M

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  13. 13
    Transition Fault Testability in Bit Parallel Multipliers over GF(2^)

    Transition Fault Testability in Bit Parallel Multipliers over GF(2^) by Rahaman, H., Mathew, J., Sikdar, B.K., Pradhan, D.K.

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  14. 14
    A Test Design for Quick Determination of Incoherency in Chip Multiprocessors' Cache Realizing MOESI Protocol

    A Test Design for Quick Determination of Incoherency in Chip Multiprocessors' Cache Realizing MOESI Protocol by Dalui, M., Sikdar, B. K.

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  15. 15
    An Efficient Test Design for Verification of Cache Coherence in CMPs

    An Efficient Test Design for Verification of Cache Coherence in CMPs by Dalui, M., Sikdar, B. K.

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  16. 16
    A Protocol Independent Test Design for Quick Determination of Incoherency in CMPs' Cache

    A Protocol Independent Test Design for Quick Determination of Incoherency in CMPs' Cache by Dalui, M., Sikdar, B. K.

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  17. 17
    CA based implementation of March test for high speed memories

    CA based implementation of March test for high speed memories by Saha, M., Sikdar, B. K.

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  18. 18
    Design of Nonlinear CA Based TPG Without Prohibited Pattern Set In Linear Time

    Design of Nonlinear CA Based TPG Without Prohibited Pattern Set In Linear Time by Das, Sukanta, Kundu, Anirban, Sikdar, Biplab K, Chaudhuri, P Pal

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  19. 19
    A cellular automata based high speed test hardware for word-organized memories

    A cellular automata based high speed test hardware for word-organized memories by Saha, M., Sikdar, B. K.

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  20. 20
    An efficient test design for CMPs cache coherence

    An efficient test design for CMPs cache coherence by Dalui, M., Sikdar, B. K.

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