Search Results - Sima, Vlad Mihai

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  1. 1
    A Survey and Evaluation of FPGA High-Level Synthesis Tools

    A Survey and Evaluation of FPGA High-Level Synthesis Tools by Nane, Razvan, Sima, Vlad-Mihai, Pilato, Christian, Jongsok Choi, Fort, Blair, Canis, Andrew, Yu Ting Chen, Hsuan Hsiao, Brown, Stephen, Ferrandi, Fabrizio, Anderson, Jason, Bertels, Koen

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  2. 2
    Hardware acceleration of BWA-MEM genomic short read mapping for longer read lengths

    Hardware acceleration of BWA-MEM genomic short read mapping for longer read lengths by Houtgast, Ernst Joachim, Sima, Vlad-Mihai, Bertels, Koen, Al-Ars, Zaid

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  3. 3
    HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms

    HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms by Bertels, K, Sima, Vlad-Mihai, Yankova, Y, Kuzmanov, G, Luk, W, Coutinho, G, Ferrandi, F, Pilato, C, Lattuada, M, Sciuto, D, Michelotti, A

    Published in IEEE MICRO
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  4. 4
    Comparative Analysis of System-Level Acceleration Techniques in Bioinformatics: A Case Study of Accelerating the Smith-Waterman Algorithm for BWA-MEM

    Comparative Analysis of System-Level Acceleration Techniques in Bioinformatics: A Case Study of Accelerating the Smith-Waterman Algorithm for BWA-MEM by Houtgast, Ernst Joachim, Sima, Vlad-Mihai, Bertels, Koen, Al-Ars, Zaid

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  5. 5
    High Performance Streaming Smith-Waterman Implementation with Implicit Synchronization on Intel FPGA using OpenCL

    High Performance Streaming Smith-Waterman Implementation with Implicit Synchronization on Intel FPGA using OpenCL by Houtgast, Ernst Joachim, Sima, Vlad-Mihai, Al-Ars, Zaid

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  6. 6
    DRuiD: Designing reconfigurable architectures with decision-making support

    DRuiD: Designing reconfigurable architectures with decision-making support by Mariani, Giovanni, Palermo, Gianluca, Meeuws, Roel, Sima, Vlad-Mihai, Silvano, Cristina, Bertels, Koen

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  7. 7
    A lightweight speculative and predicative scheme for hardware execution

    A lightweight speculative and predicative scheme for hardware execution by Nane, R., Sima, V., Bertels, K.

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  8. 8
    Run-time optimization of a dynamically reconfigurable embedded system through performance prediction

    Run-time optimization of a dynamically reconfigurable embedded system through performance prediction by Mariani, Giovanni, Sima, Vlad-Mihai, Palermo, Gianluca, Zaccaria, Vittorio, Marchiori, Giacomo, Silvano, Cristina, Bertels, Koen

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  9. 9
    Quipu: A Statistical Model for Predicting Hardware Resources

    Quipu: A Statistical Model for Predicting Hardware Resources by Meeuws, Roel, Ostadzadeh, S. Arash, Galuzzi, Carlo, Sima, Vlad Mihai, Nane, Razvan, Bertels, Koen

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  10. 10
    Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures

    Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures by Mariani, Giovanni, Sima, Vlad-Mihai, Palermo, Gianluca, Zaccaria, Vittorio, Silvano, Cristina, Bertels, Koen

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  11. 11
    Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures

    Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures by Mariani, G., Sima, V., Palermo, G., Zaccaria, V., Silvano, C., Bertels, K.

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  12. 12
    Runtime Memory Allocation in a Heterogeneous Reconfigurable Platform

    Runtime Memory Allocation in a Heterogeneous Reconfigurable Platform by Sima, V.-M., Bertels, K.

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  13. 13
    Compiler assisted runtime task scheduling on a reconfigurable computer

    Compiler assisted runtime task scheduling on a reconfigurable computer by Sabeghi, M., Sima, V.-M., Bertels, K.

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  14. 14
    DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler

    DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler by Nane, R., Sima, V., Olivier, B., Meeuws, R., Yankova, Y., Bertels, K.

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  15. 15
    Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform

    Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform by Sima, V.-M., Bertels, K.

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  16. 16
    IP-XACT extensions for Reconfigurable Computing

    IP-XACT extensions for Reconfigurable Computing by Nane, R., van Haastregt, S., Stefanov, T., Kienhuis, B., Sima, V. M., Bertels, K.

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  17. 17
    Resource allocation algorithm and OpenMP extensions for parallel execution on a heterogeneous reconfigurable platform

    Resource allocation algorithm and OpenMP extensions for parallel execution on a heterogeneous reconfigurable platform by Sima, V.-M., Panainte, E.M., Bertels, K.

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  18. 18
    Hartes Toolchain Early Evaluation: Profiling, Compilation and HDL Generation

    Hartes Toolchain Early Evaluation: Profiling, Compilation and HDL Generation by Bertels, Koen, Kuzmanov, Georgi, Panainte, Elena Moscu, Gaydadjiev, Georgi, Yankova, Yana, Sima, Vlad Mihai, Sigdel, Kamana, Meeuws, Roel, Vassiliadis, Stamatis

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  19. 19
    A novel method of nondestructive characterization via X-ray and high-speed imaging of TiC/IN718 composite materials manufactured by LMD

    A novel method of nondestructive characterization via X-ray and high-speed imaging of TiC/IN718 composite materials manufactured by LMD by Mihai, Sabin, Toma, Petru-Vlad, Sima, Adrian, Chioibasu, Diana, Popescu, Andrei C.

    Published in Results in engineering
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  20. 20
    Use of a Micronutrient Cocktail to Improve Metabolic Dysfunction-Associated Steatotic Liver Disease (MASLD) in Adults with Obesity: A Randomized, Double-Blinded Pilot Clinical Trial

    Use of a Micronutrient Cocktail to Improve Metabolic Dysfunction-Associated Steatotic Liver Disease (MASLD) in Adults with Obesity: A Randomized, Double-Blinded Pilot Clinical Tria... by Perva, Iulia Teodora, Simina, Iulia Elena, Bende, Renata, Motofelea, Alexandru Cătălin, Chirita Emandi, Adela, Andreescu, Nicoleta, Sima, Alexandra, Vlad, Adrian, Sporea, Ioan, Zimbru, Cristian, Tutac, Paul Calin, Puiu, Maria, Niculescu, Mihai Dinu

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