Search Results - Spelgatti, G.

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  1. 1
    A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS

    A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS by Radice, F., Bruccoleri, M., Ganzerli, M., Spelgatti, G., Sanzogni, D., Pozzoni, M., Mazzanti, A.

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  2. 2
    A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization

    A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization by Pozzoni, M., Erba, S., Sanzogni, D., Ganzerli, M., Viola, P., Baldi, D., Repossi, M., Spelgatti, G., Svelto, F.

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  3. 3
    Multichannel speech enhancement using MEMS microphones

    Multichannel speech enhancement using MEMS microphones by Skordilis, Z. I., Tsiami, A., Maragos, P., Potamianos, G., Spelgatti, L., Sannino, R.

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  4. 4
    An Accelerator for Physics Simulations

    An Accelerator for Physics Simulations by Danese, Giovanni, Leporati, Francesco, Bera, Marco, Giachero, Mauro, Nazzicari, Nelson, Spelgatti, Alvaro

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  5. 5
    The Totem neurochip: an FPGA implementation

    The Totem neurochip: an FPGA implementation by Avogadro, M., Bera, M., Danese, G., Leporati, F., Spelgatti, A.

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  6. 6
    FPGA based coprocessor to calculate the energy of dipolar system

    FPGA based coprocessor to calculate the energy of dipolar system by Danese, G., De Lotto, L., Leporati, F., Spelgatti, A.

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  7. 7
    Hardware and software support for the implementation of dipolar system simulations onto an accelerator

    Hardware and software support for the implementation of dipolar system simulations onto an accelerator by Bera, M., Danese, G., De Lotto, I., Leporati, F., Spelgatti, A.

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  8. 8
    An accelerator for double precision floating point operations

    An accelerator for double precision floating point operations by Danese, G., De Lotto, L., Leporati, F., Scaricabarozzi, M., Spelgatti, A.

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  9. 9
    An Application Specific Processor for Montecarlo Simulations

    An Application Specific Processor for Montecarlo Simulations by Danese, G., Leporati, F., Bera, M., Giachero, M., Nazzicari, N., Spelgatti, A.

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  10. 10
    A development and simulation environment for a floating point operations FPGA based accelerator

    A development and simulation environment for a floating point operations FPGA based accelerator by Bera, M., Danese, G., De Lotto, I., Leporati, F., Spelgatti, A.

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