Adaptive Test With Test Escape Estimation for Mixed-Signal ICs by Stratigopoulos, Haralampos-G., Streitwieser, Christian

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One-Shot Non-Intrusive Calibration Against Process Variations for Analog/RF Circuits by Andraud, Martin, Stratigopoulos, Haralampos-G, Simeu, Emmanuel

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Compact Functional Testing for Neuromorphic Computing Circuits by El-Sayed, Sarah A., Spyrou, Theofilos, Camunas-Mesa, Luis A., Stratigopoulos, Haralampos-G.

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SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety by Pavlidis, Antonios, Louerat, Marie-Minerve, Faehn, Eric, Kumar, Anand, Stratigopoulos, Haralampos-G.

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Analog and Mixed-Signal IC Security via Sizing Camouflaging by Leonhard, Julian, Sayed, Alhassan, Louerat, Marie-Minerve, Aboushady, Hassan, Stratigopoulos, Haralampos-G.

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RF Transceiver Security Against Piracy Attacks by Rizo, Alan Rodrigo Diaz, Leonhard, Julian, Aboushady, Hassan, Stratigopoulos, Haralampos-G.

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Anti-Piracy Design of RF Transceivers by Diaz-Rizo, Alan Rodrigo, Aboushady, Hassan, Stratigopoulos, Haralampos-G.

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Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security by Elshamy, Mohamed, Sayed, Alhassan, Louerat, Marie-Minerve, Aboushady, Hassan, Stratigopoulos, Haralampos-G.

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Digital-to-Analog Hardware Trojan Attacks by Elshamy, Mohamed, Natale, Giorgio Di, Sayed, Alhassan, Pavlidis, Antonios, Louerat, Marie-Minerve, Aboushady, Hassan, Stratigopoulos, Haralampos-G.

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Leaking Wireless ICs via Hardware Trojan-Infected Synchronization by Diaz-Rizo, Alin Rodrigo, Aboushady, Hassan, Stratigopoulos, Haralampos-G.

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Digitally Assisted Mixed-Signal Circuit Security by Leonhard, Julian, Limaye, Nimisha, Turk, Shadi, Sayed, Alhassan, Rizo, Alan Rodrigo Diaz, Aboushady, Hassan, Sinanoglu, Ozgur, Stratigopoulos, Haralampos-G.

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Fast Monte Carlo-Based Estimation of Analog Parametric Test Metrics by Stratigopoulos, Haralampos-G, Sunter, Stephen

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Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique by Laraba, Asma, Stratigopoulos, Haralampos-G, Mir, Salvador, Naudet, Herve

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Test Metrics Model for Analog Test Development by Stratigopoulos, H-G

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Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure by Portolan, Michele, Pavlidis, Antonios, Di Natale, Giorgio, Faehn, Eric, Stratigopoulos, Haralampos-G.

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Reliability Analysis of a Spiking Neural Network Hardware Accelerator by Spyrou, Theofilos, El-Sayed, Sarah A., Afacan, Engin, Camunas-Mesa, Luis A., Linares-Barranco, Bernabe, Stratigopoulos, Haralampos-G.

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Neuron Fault Tolerance in Spiking Neural Networks by Spyrou, Theofilos, El-Sayed, Sarah A., Afacan, Engin, Camunas-Mesa, Luis A., Linares-Barranco, Bernabe, Stratigopoulos, Haralampos-G.

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MixLock: Securing Mixed-Signal Circuits via Logic Locking by Leonhard, Julian, Yasin, Muhammad, Turk, Shadi, Nabeel, Mohammed Thari, Louerat, Marie-Minerve, Chotin-Avot, Roselyne, Aboushady, Hassan, Sinanoglu, Ozgur, Stratigopoulos, Haralampos-G.

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Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs by Pavlidis, Antonios, Faehn, Eric, Louerat, Marie-Minerve, Stratigopoulos, Haralampos-G.

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SyncLock: RF Transceiver Security Using Synchronization Locking by Rizo, Alan Rodrigo Diaz, Aboushady, Hassan, Stratigopoulos, Haralampos-G.

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