Dynamic Vpass Controlled Program Scheme and Optimized Erase Vth Control for High Program Inhibition in MLC NAND Flash Memories by PARK, Ki-Tae, YOUNGSUN SONG, MYOUNGGON KANG, SUNGSOO LEE, LIM, Young-Ho, SUH, Kang-Deog, CHILHEE CHUNG

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A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme by Suh, Kang-Deog, Suh, Byung-Hoon, Lim, Young-Ho, Kim, Jin-Ki, Choi, Young-Joon, Koh, Yong-Nam, Lee, Sung-Soo, Kwon, Suk-Chon, Choi, Byung-Soon, Yum, Jin-Sun, Choi, Jung-Hyuk, Kim, Jang-Rae, Lim, Hyung-Kyu

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New scaling limitation of the floating gate cell in NAND Flash Memory by Yong Seok Kim, Dong Jun Lee, Chi Kyoung Lee, Hyun Ki Choi, Seong Soo Kim, Jai Hyuk Song, Du Heon Song, Jeong-Hyuk Choi, Kang-Deog Suh, Chilhee Chung

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A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes by Cho, Taehee, Lee, Yeong-Taek, Kim, Eun-Cheol, Lee, Jin-Wook, Choi, Sunmi, Lee, Seungjae, Kim, Dong-Hwan, Han, Wook-Ghee, Lim, Young-Ho, Lee, Jae-Duk, Choi, Jung-Dal, Suh, Kang-Deog

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A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications by Lee, J., Sung-Soo Lee, Oh-Suk Kwon, Kyeong-Han Lee, Dae-Seok Byeon, In-Young Kim, Kyoung-Hwa Lee, Young-Ho Lim, Byung-Soon Choi, Jong-Sik Lee, Wang-Chul Shin, Jeong-Hyuk Choi, Kang-Deog Suh

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Improving Read Disturb Characteristics by Using Double Common Source Line and Dummy Switch Architecture in Multi Level Cell NAND Flash Memory with Low Power Consumption by Kang, Myounggon, Park, Ki-Tae, Song, Youngsun, Lim, Youngho, Suh, Kang-Deog, Shin, Hyungcheol

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32nm 3-bit 32Gb NAND Flash Memory with DPT (d̲ouble p̲atterning t̲echnology) process for mass production by Bong Tae Park, Jai Hyuk Song, Eun Suk Cho, Seung Wan Hong, Jae Youn Kim, Yong Ju Choi, Yong Seok Kim, Seung Jun Lee, Chi Kyoung Lee, Dae Woong Kang, Dong Jun Lee, Byoung Taek Kim, Yong Joon Choi, Woon Kyung Lee, Jeong-Hyuk Choi, Kang-Deog Suh, Tae-Sung Jung

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A 3.3-V, 4-Mb nonvolatile ferroelectric RAM with selectively driven double-pulsed plate read/write-back scheme by Chung, Yeonbae, Jeon, Byung-Gil, Suh, Kang-Deog

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Optimal cell design for enhancing reliability characteristics for sub 30 nm NAND Flash memory by Eun Suk Cho, Hyun Jung Kim, Byoung Taek Kim, Jai Hyuk Song, Du Heon Song, Jeong-Hyuk Choi, Kang-Deog Suh, Chilhee Chung

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Impact of floating gate dry etching on erase characteristics in NOR flash memory by Lee, W.H., Dong-Kyu Lee, Young-Ho Na, Keon-Soo Kim, Kun-Ok Ahn, Kang-Deog Suh, Yonghan Roh

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High-performance 1-Gb-NAND flash memory with 0.12-μm technology by Lee, June, Im, Heung-Soo, Byeon, Dae-Seok, Lee, Kyeong-Han, Chae, Dong-Hyuk, Lee, Kyong-Hwa, Won Hwang, Sang, Lee, Sung-Soo, Lim, Young-Ho, Lee, Jae-Duk, Choi, Jung-Dal, Seo, Young-Il, Lee, Jong-Sik, Suh, Kang-Deog

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A 3.3-V single power supply 16-Mb nonvolatile virtual DRAM using a NAND flash memory technology by Tae-Sung Jung, Do-Chan Choi, Sung-Hee Cho, Myong-Jae Kim, Seung-Keun Lee, Byung-Soon Choi, Jin-Sun Yum, San-Hong Kim, Dong-Gi Lee, Jong-Chang Son, Myung-Sik Yong, Heung-Kwun Oh, Sung-Bu Jun, Woung-Moo Lee, Haq, E., Kang-Deog Suh, Ali, S.B., Hyung-Kyu Lim

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0.4- mu m 3.3-V 1T1C 4-Mb nonvolatile ferroelectric RAM with fixed bitline reference voltage scheme and data protection circuit by Jeon, Byung-Gil, Choi, Mun-Kyu, Song, Yoonjong, Oh, Seung-Kyu, Chung, Yeonbae, Suh, Kang-Deog, Kim, Kinam

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Influence of plasma edge damage on erase characteristics of NOR flash EEPROM using channel erase method by Dong-Kyu Lee, Lee, W.H., Young-Ho Na, Keon-Soo Kim, Kun-Ok Ahn, Kang-Deog Suh, Yonghan Roh

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3.3V 128Mb multi-level NAND flash memory for mass storage applications by Jung, Tae-Sung, Choi, Young-Joon, Suh, Kang-Deog, Suh, Byung-Hoon, Kim, Jin-Ki, Lim, Young-Ho, Koh, Yong-Nam, Park, Jong-Wook, Lee, Ki-Jong, Park, Jung-Hoon, Park, Kee-Tae, Kim, Jang-Rae, Lee, Jeong-Hyong, Lim, Hyung-Kyu

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8-bit-resolution, 360- mu s write time nonvolatile analog memory based on Differentially Balanced Constant-Tunneling-Current Scheme (DBCS) by Kim, Kyu-Hyoun, Lee, Kwyro, Jung, Tae-Sung, Suh, Kang-Deog

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An analysis for the potential of floating guard rings by Suh, Kang-Deog, Hong, Soon-Won, Lee, Kwyro, Kim, Choong-Ki

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A 1.8 V 1 Gb NAND flash memory with 0.12 mu m STI process technology by Lee, June, Im, Heung-Soo, Byeon, Dae-Seok, Lee, Kyeong-Han, Chae, Dong-Hyuk, Lee, Kyong-Hwa, Lim, Young-Ho, Choi, Jung-Dal, Seo, Young-Il, Lee, Jong-Sik, Suh, Kang-Deog

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A self-consistent analytic threshold voltage model for thin SOI n-channel MOSFETs by Choi, Jin-Ho, Song, Ho-Jun, Suh, Kang-Deog, Park, Jae-Woo, Kim, Choong-Ki

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A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme by Kang-Deog Suh, Byung-Hoon Suh, Young-Ho Um, Jin-Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sung-Soo Lee, Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, Hyung-Kyu Lim

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