Search Results - TRUI, Bernhard

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  1. 1
    TEMAZ/O3 atomic layer deposition process with doubled growth rate and optimized interface properties in metal–insulator–metal capacitors

    TEMAZ/O3 atomic layer deposition process with doubled growth rate and optimized interface properties in metal–insulator–metal capacitors by Weinreich, Wenke, Tauchnitz, Tina, Polakowski, Patrick, Drescher, Maximilian, Riedel, Stefan, Sundqvist, Jonas, Seidel, Konrad, Shirazi, Mahdi, Elliott, Simon D., Ohsiek, Susanne, Erben, Elke, Trui, Bernhard

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  2. 2
    Comparison of MOCVD- and ALD-Deposited HfZrO4 Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies

    Comparison of MOCVD- and ALD-Deposited HfZrO4 Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies by KELWING, Torben, NAUMANN, Andreas, HANSCH, Walter, TRENTZSCH, Martin, TRUI, Bernhard, HERRMANN, Lutz, MUTAS, Sergej, GRAETSCH, Falk, CARTER, Rick, STEPHAN, Rolf, KÜCHER, Peter

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  3. 3
    Comparison of MOCVD- and ALD-Deposited [Formula Omitted] Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies

    Comparison of MOCVD- and ALD-Deposited [Formula Omitted] Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies by Kelwing, Torben, Naumann, Andreas, Trentzsch, Martin, Trui, Bernhard, Herrmann, Lutz, Mutas, Sergej, Graetsch, Falk, Carter, Rick, Stephan, Rolf, Kucher, Peter, Hansch, Walter

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  4. 4
    Comparison of MOCVD- and ALD-Deposited \hbox Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies

    Comparison of MOCVD- and ALD-Deposited \hbox Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies by Kelwing, Torben, Naumann, Andreas, Trentzsch, Martin, Trui, Bernhard, Herrmann, Lutz, Mutas, Sergej, Graetsch, Falk, Carter, Rick, Stephan, Rolf, Kücher, Peter, Hansch, Walter

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  5. 5
    Comparison of MOCVD- and ALD-Deposited hbox HfZrO 4 Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies

    Comparison of MOCVD- and ALD-Deposited hbox HfZrO 4 Gate Dielectrics for 32-nm High-Performance Logic SOI CMOS Technologies by Kelwing, Torben, Naumann, Andreas, Trentzsch, Martin, Trui, Bernhard, Herrmann, Lutz, Mutas, Sergej, Graetsch, Falk, Carter, Rick, Stephan, Rolf, Kucher, Peter, Hansch, Walter

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  6. 6
    Novel enhanced stressors with graded encapsulated SiGe embedded in the source and drain areas

    Novel enhanced stressors with graded encapsulated SiGe embedded in the source and drain areas by Naumann, Andreas, Kronholz, Stephan, Mowry, Anthony, Ostermay, Ina, Bierstedt, Helmut, Trui, Bernhard, Dittmar, Kornelia, Kücher, Peter, Bartha, Johann W., Kammler, Thorsten

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  7. 7
    Physical and Electrical Properties of MOCVD and ALD Deposited HfZrO 4 Gate Dielectrics for 32nm CMOS High Performance Logic SOI Technologies

    Physical and Electrical Properties of MOCVD and ALD Deposited HfZrO 4 Gate Dielectrics for 32nm CMOS High Performance Logic SOI Technologies by Kelwing, Torben, Mutas, Sergej, Trentzsch, Martin, Naumann, Andreas, Trui, Bernhard, Herrmann, Lutz, Graetsch, Falk, Klein, Christoph, Wilde, Lutz, Ohsiek, Susanne, Weisheit, Martin, Peeva, Anita, Richter, Inka, Prinz, Hartmut, Wuerfel, Alexander, Carter, Rick, Stephan, Rolf, Kücher, Peter, Hansch, Walter

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