Search Results - Takasuka, Kaoru

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  1. 1
    A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, 98 dB THD, and 79 dB SNDR

    A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, 98 dB THD, and 79 dB SNDR by Kyehyung Lee, Jeongseok Chae, Aniya, M., Hamashita, K., Takasuka, K., Takeuchi, S., Temes, G.C.

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  2. 2
    A Low Power Pipelined ADC Using Capacitor and Opamp Sharing Technique With a Scheme to Cancel the Effect of Signal Dependent Kickback

    A Low Power Pipelined ADC Using Capacitor and Opamp Sharing Technique With a Scheme to Cancel the Effect of Signal Dependent Kickback by Sasidhar, N., Youn-Jae Kook, Takeuchi, S., Hamashita, K., Takasuka, K., Hanumolu, P.K., Un-Ku Moon

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  3. 3
    A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver

    A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver by Kyehyung Lee, Qingdong Meng, Sugimoto, T., Hamashita, K., Takasuka, K., Takeuchi, S., Un-Ku Moon, Temes, G.C.

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  4. 4
    A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators

    A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators by Gil-Cho Ahn, Dong-Young Chang, Brown, M.E., Ozaki, N., Youra, H., Yamamura, K., Hamashita, K., Takasuka, K., Temes, G.C., Un-Ku Moon

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  5. 5
    A 60% PAE WCDMA Handset Transmitter Amplifier

    A 60% PAE WCDMA Handset Transmitter Amplifier by Warr, P.A., Morris, K.A., Watkins, G.T., Horseman, T.R., Takasuka, K., Ueda, Y., Kobayashi, Y., Miya, S.

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  6. 6
    Observation and Utilization of Boron Segregation in Trench MOSFETs to Improve Figure of Merit (FOM)

    Observation and Utilization of Boron Segregation in Trench MOSFETs to Improve Figure of Merit (FOM) by Hao Wang, Xu, H.P.E., Wai Tung Ng, Fukumoto, K., Ishikawa, A., Furukawa, Y., Imai, H., Naito, T., Sato, N., Sakai, K., Tamura, S., Takasuka, K.

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  7. 7
    Evolvable analog LSIs: Adaptation to process variations via genetic algorithms

    Evolvable analog LSIs: Adaptation to process variations via genetic algorithms by Murakawa, Masahiro, Kasai, Yuji, Adachi, Toshio, Takasuka, Kaoru, Yoshizawa, Shuji, Higuchi, Tetsuya

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  8. 8
    Lateral high-speed bipolar transistors on SOI for RF SoC applications

    Lateral high-speed bipolar transistors on SOI for RF SoC applications by Sun, I.-S.M., Wai Tung Ng, Kanekiyo, K., Kobayashi, T., Mochizuki, H., Toita, M., Imai, H., Ishikawa, A., Tamura, S., Takasuka, K.

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  9. 9
    A Novel Orthogonal Gate EDMOS Transistor With Improved dv/dt Capability and Figure of Merit (FOM)

    A Novel Orthogonal Gate EDMOS Transistor With Improved dv/dt Capability and Figure of Merit (FOM) by Hao Wang, Xu, H.P.E., Wai Tung Ng, Fukumoto, K., Abe, K., Ishikawa, A., Furukawa, Y., Imai, H., Naito, T., Sato, N., Sakai, K., Tamura, S., Takasuka, K.

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  10. 10
    An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions

    An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions by Murakawa, M., Adachi, T., Niino, Y., Kasai, Y., Takahashi, E., Takasuka, K., Higuchi, T.

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  11. 11
    A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR

    A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR by Kyehyung Lee, Jeongseok Chae, Aniya, M., Hamashita, K., Takasuka, K., Takeuchi, S., Temes, G.C.

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  12. 12
    Characterizing diodes for RF ESD protection

    Characterizing diodes for RF ESD protection by Guang Chen, Haigang Feng, Haolu Xie, Rouying Zhan, Qiong Wu, Guan, X., Wang, A., Takasuka, K., Tamura, S., Zhihua Wang, Chun Zhang

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  13. 13
    An Optimized Pipelined-Subranging ADC Architecture

    An Optimized Pipelined-Subranging ADC Architecture by Wu, Qiong, Fan, Siqiang, Wang, Albert, Takasuka, Kaoru, Takeuchi, S.

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  14. 14
    A 1.8V 36-mW 11-bit 80MS/s pipelined ADC using capacitor and opamp sharing

    A 1.8V 36-mW 11-bit 80MS/s pipelined ADC using capacitor and opamp sharing by Naga Sasidhar, Youn-Jae Kook, Seiji Takeuchi, Koichi Hamashita, Kaoru Takasuka, Pavan Kumar Hanumolu, Un-Ku Moon

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  15. 15
    Lateral high-speed bipolar transistors on SOI for RF SoC applications : Integrated Circuits Technologies for RF Circuit Applications

    Lateral high-speed bipolar transistors on SOI for RF SoC applications : Integrated Circuits Technologies for RF Circuit Applications by SUN, I.-Shan Michael, WAI TUNG NG, KANEKIYO, Koji, KOBAYASHI, Takaaki, MOCHIZUKI, Hidenori, TOITA, Masato, IMAI, Hisaya, ISHIKAWA, Akira, TAMURA, Satoru, TAKASUKA, Kaoru

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  16. 16
    A 70V UMOS Technology with Trenched LOCOS Process to Reduce Cgs

    A 70V UMOS Technology with Trenched LOCOS Process to Reduce Cgs by Hao Wang, Trescases, O., Xu, H.P.E., Wai Tung Ng, Fukumoto, K., Ishikawa, A., Furukawa, Y., Imai, H., Naito, T., Sato, N., Sakai, K., Tamura, S., Takasuka, K.

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  17. 17
    RF characterization of ESD protection structures [RFIC applications]

    RF characterization of ESD protection structures [RFIC applications] by Guang Chen, Haigang Feng, Haolu Xie, Rouying Zhan, Qiong Wu, Xiaokang Guan, Wang, A., Takasuka, K., Tamura, S., Zhihua Wang, Chun Zhang

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  18. 18
    An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions

    An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions by Murakawa, M., Adachi, T., Nino, Y., Takahashi, E., Kasai, Y., Takasuka, K., Higuchi, T.

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  19. 19
    High speed distortion correcting mixed signal preprocessor for image scanning

    High speed distortion correcting mixed signal preprocessor for image scanning by Takeuchi, Seiji, Motozawa, Yasuhiro, Nakamura, Isamu, Takasuka, Kaoru, Barlow, Allen

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  20. 20
    0.9-V Rail-to-Rail Operational Amplifiers with Adaptive Threshold Voltage Control

    0.9-V Rail-to-Rail Operational Amplifiers with Adaptive Threshold Voltage Control by Adachi, T., Takasuka, K.

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