Search Results - Tambara, Lucas Antunes

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  1. 1
    Analyzing Reliability and Performance Trade-Offs of HLS-Based Designs in SRAM-Based FPGAs Under Soft Errors

    Analyzing Reliability and Performance Trade-Offs of HLS-Based Designs in SRAM-Based FPGAs Under Soft Errors by Antunes Tambara, Lucas, Tonfat, Jorge, Santos, Andre, Lima Kastensmidt, Fernanda, Medina, Nilberto H., Added, Nemitala, Aguiar, Vitor A. P., Aguirre, Fernando, Silveira, Marcilei A. G.

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  2. 2
    Reliability-Performance Analysis of Hardware and Software Co-Designs in SRAM-Based APSoCs

    Reliability-Performance Analysis of Hardware and Software Co-Designs in SRAM-Based APSoCs by Antunes Tambara, Lucas, Kastensmidt, Fernanda Lima, Rech, Paolo, Lins, Filipe, Medina, Nilberto H., Added, Nemitala, Aguiar, Vitor A. P., Silveira, Marcilei A. G.

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  3. 3
    Analyzing the Impact of Radiation-Induced Failures in Programmable SoCs

    Analyzing the Impact of Radiation-Induced Failures in Programmable SoCs by Tambara, Lucas Antunes, Rech, Paolo, Chielle, Eduardo, Tonfat, Jorge, Lima Kastensmidt, Fernanda

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  4. 4
    Single Event Effects Characterization of the GR716A Rad-Hard LEON3FT Microcontroller

    Single Event Effects Characterization of the GR716A Rad-Hard LEON3FT Microcontroller by Tambara, Lucas Antunes, De Oliveira, Adria Barros, Hernandez, Francisco, Martinsson, Jorgen Trabjerg, Johansson, Fredrik, Andersson, Jan

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  5. 5
    Applying lockstep in dual-core ARM Cortex-A9 to mitigate radiation-induced soft errors

    Applying lockstep in dual-core ARM Cortex-A9 to mitigate radiation-induced soft errors by Barros de Oliveira, Adria, Antunes Tambara, Lucas, Lima Kastensmidt, Fernanda

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  6. 6
    Evaluating the efficiency of using TMR in the high-level synthesis design flow of SRAM-based FPGA

    Evaluating the efficiency of using TMR in the high-level synthesis design flow of SRAM-based FPGA by Flores dos Santos, Andre, Antunes Tambara, Lucas, Lima Kastensmidt, Fernanda

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