A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With ≪ -16 dB Return Loss Over 10 GHz Bandwidth by Kossel, M., Menolfi, C., Weiss, J., Buchmann, P., von Bueren, G., Rodoni, L., Morf, T., Toifl, T., Schmatz, M.

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VCSEL-based optical links in burst-mode slow optical power ramp-up and how to achieve ultra-short wake-up times by Morf, T, Seifried, M, Cevrero, A, Ozkaya, I, Menolfi, C, Kuchta, D, Kossel, M, Francese, P, Kull, L, Kropp, J, Toifl, T

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Feedback delay reduction of Tomlinson–Harashima precoder in 14 nm CMOS via pipelined MAC units operated entirely with CSA arithmetic by Kossel, M, Brändli, M, Francese, P, Kull, L, Menolfi, C, Morf, T, Toifl, T, Cevrero, A, Luu, D, Özkaya, I, Yüksel, H

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A 22-gb/s PAM-4 receiver in 90-nm CMOS SOI technology by Toifl, T., Menolfi, C., Ruegg, M., Reutemann, R., Buchmann, P., Kossel, M., Morf, T., Weiss, J., Schmatz, M.L.

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LC PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS by Kossel, M., Morf, T., Weiss, J., Buchmann, P., Menolfi, C., Toifl, T., Schmatz, M.L.

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30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology by Ellinger, F., Rodoni, L.C., Sialm, G., Kromer, C., von Buren, G., Schmatz, M.L., Menolfi, C., Toifl, T., Morf, T., Kossel, M., Jackel, H.

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Low-complexity adaptive equalization for high-speed chip-to-chip communication paths by zero-forcing of jitter components by Toifl, T., Schmatz, M., Menolfi, C.

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A 1.25-5 GHz Clock Generator With High-Bandwidth Supply-Rejection Using a Regulated-Replica Regulator in 45-nm CMOS by Toifl, T., Menolfi, C., Buchmann, P., Kossel, M., Morf, T., Schmatz, M.L.

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Switched Inductor With Wide Tuning Range and Small Inductance Step Sizes by Kossel, M., Morf, T., Buchmann, P., Schmatz, M.L., Menolfi, C., Toifl, T.

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A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology by Bulzacchelli, J. F., Menolfi, C., Beukema, T. J., Storaska, D. W., Hertle, J., Hanson, D. R., Ping-Hsuan Hsieh, Rylov, S. V., Furrer, D., Gardellini, D., Prati, A., Morf, T., Sharma, V., Kelkar, R., Ainspan, H. A., Kelly, W. R., Chieco, L. R., Ritter, G. A., Sorice, J. A., Garlett, J. D., Callan, R., Brandli, M., Buchmann, P., Kossel, M., Toifl, T., Friedman, D. J.

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A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS by Toifl, T., Menolfi, C., Ruegg, M., Reutemann, R., Dreps, D., Beukema, T., Prati, A., Gardellini, D., Kossel, M., Buchmann, P., Brandli, M., Francese, P. A., Morf, T.

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Integrated circuits for particle physics experiments by Snoeys, W., Anelli, G., Campbell, M., Cantatore, E., Faccio, F., Heijne, E.H.M., Jarron, P., Kloukinas, K.C., Marchioro, A., Moreira, P., Toifl, T., Wyllie, K.

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A 3.1mW 8b 1.2GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS by Kull, L., Toifl, T., Schmatz, M., Francese, P. A., Menolfi, C., Braendli, M., Kossel, M., Morf, T., Andersen, T. M., Leblebici, Y.

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4-channel rad-hard delay generation ASIC with 1 ns timing resolution for LHC by Toifl, T., Vari, R., Moreira, P., Marchioro, A.

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A 28Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32nm SOI CMOS technology by Bulzacchelli, J., Beukema, T., Storaska, D., Hsieh, P., Rylov, S., Furrer, D., Gardellini, D., Prati, A., Menolfi, C., Hanson, D., Hertle, J., Morf, T., Sharma, V., Kelkar, R., Ainspan, H., Kelly, W., Ritter, G., Garlett, J., Callan, R., Toifl, T., Friedman, D.

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A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS by Cevrero, A., Aprile, C., Francese, P. A., Bapst, U., Menolfi, C., Braendli, M., Kossel, M., Morf, T., Kull, L., Yueksel, H., Oezkaya, I., Leblebici, Y., Cevher, V., Toifl, T.

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A 28Gb/s source-series terminated TX in 32nm CMOS SOI by Menolfi, C., Hertle, J., Toifl, T., Morf, T., Gardellini, D., Braendli, M., Buchmann, P., Kossel, M.

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Room-temperature THz imaging based on antenna-coupled MOSFET bolometer by Morf, T., Klein, B., Despont, M., Drechsler, U., Kull, L., Corcos, D., Elad, D., Kaminski, N., Braendli, M., Menolfi, C., Kossel, M., Francese, P. A., Toifl, T., Plettemeier, D.

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@@iLC@ PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS by Kossel, M, Morf, T, Weiss, J, Buchmann, P, Menolfi, C, Toifl, T, Schmatz, M L

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A 14Gb/s high-swing thin-oxide device SST TX in 45nm CMOS SOI by Menolfi, C, Toifl, T, Rueegg, M, Braendli, M, Buchmann, P, Kossel, M, Morf, T

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